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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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cxgb4: Add support for Inline IPSec Tx
Added Tx routine for ULD - define interface for ULD Tx. Export routines used for Tx data - Routines common for data transmit are used by cxgb4 and chcr drivers. - EXPORT routines enable transmit from chcr driver. Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Atul Gupta
Herbert Xu
parent
23eb61d304
commit
a6ec572bfa
@ -58,6 +58,13 @@
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extern struct list_head adapter_list;
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extern struct mutex uld_mutex;
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/* Suspend an Ethernet Tx queue with fewer available descriptors than this.
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* This is the same as calc_tx_descs() for a TSO packet with
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* nr_frags == MAX_SKB_FRAGS.
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*/
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#define ETHTXQ_STOP_THRES \
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(1 + DIV_ROUND_UP((3 * MAX_SKB_FRAGS) / 2 + (MAX_SKB_FRAGS & 1), 8))
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enum {
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MAX_NPORTS = 4, /* max # of ports */
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SERNUM_LEN = 24, /* Serial # length */
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@ -564,6 +571,7 @@ enum { /* adapter flags */
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enum {
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ULP_CRYPTO_LOOKASIDE = 1 << 0,
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ULP_CRYPTO_IPSEC_INLINE = 1 << 1,
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};
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struct rx_sw_desc;
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@ -968,6 +976,11 @@ enum {
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SCHED_CLASS_RATEMODE_ABS = 1, /* Kb/s */
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};
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struct tx_sw_desc { /* SW state per Tx descriptor */
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struct sk_buff *skb;
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struct ulptx_sgl *sgl;
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};
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/* Support for "sched_queue" command to allow one or more NIC TX Queues
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* to be bound to a TX Scheduling Class.
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*/
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@ -1700,4 +1713,14 @@ void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, struct sge_fl *fl);
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void free_tx_desc(struct adapter *adap, struct sge_txq *q,
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unsigned int n, bool unmap);
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void free_txq(struct adapter *adap, struct sge_txq *q);
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void cxgb4_reclaim_completed_tx(struct adapter *adap,
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struct sge_txq *q, bool unmap);
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int cxgb4_map_skb(struct device *dev, const struct sk_buff *skb,
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dma_addr_t *addr);
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void cxgb4_inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *q,
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void *pos);
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void cxgb4_write_sgl(const struct sk_buff *skb, struct sge_txq *q,
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struct ulptx_sgl *sgl, u64 *end, unsigned int start,
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const dma_addr_t *addr);
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void cxgb4_ring_tx_db(struct adapter *adap, struct sge_txq *q, int n);
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#endif /* __CXGB4_H__ */
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@ -3096,6 +3096,8 @@ static int chcr_show(struct seq_file *seq, void *v)
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atomic_read(&adap->chcr_stats.error));
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seq_printf(seq, "Fallback: %10u \n",
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atomic_read(&adap->chcr_stats.fallback));
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seq_printf(seq, "IPSec PDU: %10u\n",
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atomic_read(&adap->chcr_stats.ipsec_cnt));
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return 0;
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}
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@ -4096,7 +4096,7 @@ static int adap_init0(struct adapter *adap)
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} else {
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adap->vres.ncrypto_fc = val[0];
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}
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adap->params.crypto |= ULP_CRYPTO_LOOKASIDE;
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adap->params.crypto = ntohs(caps_cmd.cryptocaps);
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adap->num_uld += 1;
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}
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#undef FW_PARAM_PFVF
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@ -637,6 +637,7 @@ static void uld_init(struct adapter *adap, struct cxgb4_lld_info *lld)
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lld->nchan = adap->params.nports;
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lld->nports = adap->params.nports;
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lld->wr_cred = adap->params.ofldq_wr_cred;
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lld->crypto = adap->params.crypto;
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lld->iscsi_iolen = MAXRXDATA_G(t4_read_reg(adap, TP_PARA_REG2_A));
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lld->iscsi_tagmask = t4_read_reg(adap, ULP_RX_ISCSI_TAGMASK_A);
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lld->iscsi_pgsz_order = t4_read_reg(adap, ULP_RX_ISCSI_PSZ_A);
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@ -297,6 +297,7 @@ struct chcr_stats_debug {
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atomic_t complete;
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atomic_t error;
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atomic_t fallback;
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atomic_t ipsec_cnt;
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};
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#define OCQ_WIN_OFFSET(pdev, vres) \
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@ -322,6 +323,7 @@ struct cxgb4_lld_info {
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unsigned char wr_cred; /* WR 16-byte credits */
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unsigned char adapter_type; /* type of adapter */
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unsigned char fw_api_ver; /* FW API version */
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unsigned char crypto; /* crypto support */
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unsigned int fw_vers; /* FW version */
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unsigned int iscsi_iolen; /* iSCSI max I/O length */
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unsigned int cclk_ps; /* Core clock period in psec */
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@ -370,6 +372,7 @@ struct cxgb4_uld_info {
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struct t4_lro_mgr *lro_mgr,
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struct napi_struct *napi);
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void (*lro_flush)(struct t4_lro_mgr *);
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int (*tx_handler)(struct sk_buff *skb, struct net_device *dev);
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};
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int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
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@ -41,6 +41,7 @@
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#include <linux/jiffies.h>
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#include <linux/prefetch.h>
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#include <linux/export.h>
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#include <net/xfrm.h>
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#include <net/ipv6.h>
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#include <net/tcp.h>
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#include <net/busy_poll.h>
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@ -53,6 +54,7 @@
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#include "t4_msg.h"
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#include "t4fw_api.h"
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#include "cxgb4_ptp.h"
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#include "cxgb4_uld.h"
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/*
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* Rx buffer size. We use largish buffers if possible but settle for single
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@ -109,14 +111,6 @@
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*/
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#define NOMEM_TMR_IDX (SGE_NTIMERS - 1)
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/*
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* Suspend an Ethernet Tx queue with fewer available descriptors than this.
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* This is the same as calc_tx_descs() for a TSO packet with
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* nr_frags == MAX_SKB_FRAGS.
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*/
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#define ETHTXQ_STOP_THRES \
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(1 + DIV_ROUND_UP((3 * MAX_SKB_FRAGS) / 2 + (MAX_SKB_FRAGS & 1), 8))
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/*
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* Suspension threshold for non-Ethernet Tx queues. We require enough room
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* for a full sized WR.
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@ -134,11 +128,6 @@
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*/
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#define MAX_CTRL_WR_LEN SGE_MAX_WR_LEN
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struct tx_sw_desc { /* SW state per Tx descriptor */
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struct sk_buff *skb;
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struct ulptx_sgl *sgl;
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};
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struct rx_sw_desc { /* SW state per Rx descriptor */
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struct page *page;
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dma_addr_t dma_addr;
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@ -248,8 +237,8 @@ static inline bool fl_starving(const struct adapter *adapter,
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return fl->avail - fl->pend_cred <= s->fl_starve_thres;
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}
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static int map_skb(struct device *dev, const struct sk_buff *skb,
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dma_addr_t *addr)
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int cxgb4_map_skb(struct device *dev, const struct sk_buff *skb,
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dma_addr_t *addr)
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{
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const skb_frag_t *fp, *end;
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const struct skb_shared_info *si;
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@ -277,6 +266,7 @@ static int map_skb(struct device *dev, const struct sk_buff *skb,
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out_err:
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return -ENOMEM;
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}
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EXPORT_SYMBOL(cxgb4_map_skb);
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#ifdef CONFIG_NEED_DMA_MAP_STATE
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static void unmap_skb(struct device *dev, const struct sk_buff *skb,
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@ -411,7 +401,7 @@ static inline int reclaimable(const struct sge_txq *q)
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}
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/**
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* reclaim_completed_tx - reclaims completed Tx descriptors
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* cxgb4_reclaim_completed_tx - reclaims completed Tx descriptors
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* @adap: the adapter
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* @q: the Tx queue to reclaim completed descriptors from
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* @unmap: whether the buffers should be unmapped for DMA
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@ -420,7 +410,7 @@ static inline int reclaimable(const struct sge_txq *q)
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* and frees the associated buffers if possible. Called with the Tx
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* queue locked.
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*/
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static inline void reclaim_completed_tx(struct adapter *adap, struct sge_txq *q,
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inline void cxgb4_reclaim_completed_tx(struct adapter *adap, struct sge_txq *q,
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bool unmap)
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{
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int avail = reclaimable(q);
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@ -437,6 +427,7 @@ static inline void reclaim_completed_tx(struct adapter *adap, struct sge_txq *q,
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q->in_use -= avail;
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}
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}
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EXPORT_SYMBOL(cxgb4_reclaim_completed_tx);
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static inline int get_buf_size(struct adapter *adapter,
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const struct rx_sw_desc *d)
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@ -833,7 +824,7 @@ static inline unsigned int calc_tx_descs(const struct sk_buff *skb)
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}
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/**
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* write_sgl - populate a scatter/gather list for a packet
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* cxgb4_write_sgl - populate a scatter/gather list for a packet
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* @skb: the packet
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* @q: the Tx queue we are writing into
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* @sgl: starting location for writing the SGL
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@ -849,9 +840,9 @@ static inline unsigned int calc_tx_descs(const struct sk_buff *skb)
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* right after the end of the SGL but does not account for any potential
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* wrap around, i.e., @end > @sgl.
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*/
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static void write_sgl(const struct sk_buff *skb, struct sge_txq *q,
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struct ulptx_sgl *sgl, u64 *end, unsigned int start,
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const dma_addr_t *addr)
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void cxgb4_write_sgl(const struct sk_buff *skb, struct sge_txq *q,
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struct ulptx_sgl *sgl, u64 *end, unsigned int start,
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const dma_addr_t *addr)
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{
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unsigned int i, len;
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struct ulptx_sge_pair *to;
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@ -903,6 +894,7 @@ static void write_sgl(const struct sk_buff *skb, struct sge_txq *q,
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if ((uintptr_t)end & 8) /* 0-pad to multiple of 16 */
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*end = 0;
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}
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EXPORT_SYMBOL(cxgb4_write_sgl);
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/* This function copies 64 byte coalesced work request to
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* memory mapped BAR2 space. For coalesced WR SGE fetches
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@ -921,14 +913,14 @@ static void cxgb_pio_copy(u64 __iomem *dst, u64 *src)
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}
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/**
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* ring_tx_db - check and potentially ring a Tx queue's doorbell
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* cxgb4_ring_tx_db - check and potentially ring a Tx queue's doorbell
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* @adap: the adapter
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* @q: the Tx queue
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* @n: number of new descriptors to give to HW
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*
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* Ring the doorbel for a Tx queue.
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*/
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static inline void ring_tx_db(struct adapter *adap, struct sge_txq *q, int n)
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inline void cxgb4_ring_tx_db(struct adapter *adap, struct sge_txq *q, int n)
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{
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/* Make sure that all writes to the TX Descriptors are committed
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* before we tell the hardware about them.
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@ -995,9 +987,10 @@ static inline void ring_tx_db(struct adapter *adap, struct sge_txq *q, int n)
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wmb();
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}
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}
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EXPORT_SYMBOL(cxgb4_ring_tx_db);
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/**
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* inline_tx_skb - inline a packet's data into Tx descriptors
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* cxgb4_inline_tx_skb - inline a packet's data into Tx descriptors
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* @skb: the packet
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* @q: the Tx queue where the packet will be inlined
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* @pos: starting position in the Tx queue where to inline the packet
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@ -1007,8 +1000,8 @@ static inline void ring_tx_db(struct adapter *adap, struct sge_txq *q, int n)
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* Most of the complexity of this operation is dealing with wrap arounds
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* in the middle of the packet we want to inline.
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*/
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static void inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *q,
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void *pos)
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void cxgb4_inline_tx_skb(const struct sk_buff *skb,
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const struct sge_txq *q, void *pos)
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{
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u64 *p;
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int left = (void *)q->stat - pos;
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@ -1030,6 +1023,7 @@ static void inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *q,
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if ((uintptr_t)p & 8)
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*p = 0;
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}
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EXPORT_SYMBOL(cxgb4_inline_tx_skb);
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static void *inline_tx_skb_header(const struct sk_buff *skb,
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const struct sge_txq *q, void *pos,
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@ -1199,6 +1193,12 @@ out_free: dev_kfree_skb_any(skb);
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pi = netdev_priv(dev);
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adap = pi->adapter;
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ssi = skb_shinfo(skb);
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#ifdef CONFIG_CHELSIO_IPSEC_INLINE
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if (xfrm_offload(skb) && !ssi->gso_size)
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return adap->uld[CXGB4_ULD_CRYPTO].tx_handler(skb, dev);
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#endif /* CHELSIO_IPSEC_INLINE */
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qidx = skb_get_queue_mapping(skb);
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if (ptp_enabled) {
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spin_lock(&adap->ptp_lock);
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@ -1215,7 +1215,7 @@ out_free: dev_kfree_skb_any(skb);
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}
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skb_tx_timestamp(skb);
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reclaim_completed_tx(adap, &q->q, true);
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cxgb4_reclaim_completed_tx(adap, &q->q, true);
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cntrl = TXPKT_L4CSUM_DIS_F | TXPKT_IPCSUM_DIS_F;
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#ifdef CONFIG_CHELSIO_T4_FCOE
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@ -1245,7 +1245,7 @@ out_free: dev_kfree_skb_any(skb);
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immediate = true;
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if (!immediate &&
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unlikely(map_skb(adap->pdev_dev, skb, addr) < 0)) {
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unlikely(cxgb4_map_skb(adap->pdev_dev, skb, addr) < 0)) {
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q->mapping_err++;
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if (ptp_enabled)
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spin_unlock(&adap->ptp_lock);
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@ -1264,7 +1264,6 @@ out_free: dev_kfree_skb_any(skb);
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end = (u64 *)wr + flits;
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len = immediate ? skb->len : 0;
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ssi = skb_shinfo(skb);
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if (ssi->gso_size) {
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struct cpl_tx_pkt_lso *lso = (void *)wr;
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bool v6 = (ssi->gso_type & SKB_GSO_TCPV6) != 0;
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@ -1341,13 +1340,13 @@ out_free: dev_kfree_skb_any(skb);
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cpl->ctrl1 = cpu_to_be64(cntrl);
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if (immediate) {
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inline_tx_skb(skb, &q->q, cpl + 1);
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cxgb4_inline_tx_skb(skb, &q->q, cpl + 1);
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dev_consume_skb_any(skb);
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} else {
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int last_desc;
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write_sgl(skb, &q->q, (struct ulptx_sgl *)(cpl + 1), end, 0,
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addr);
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cxgb4_write_sgl(skb, &q->q, (struct ulptx_sgl *)(cpl + 1),
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end, 0, addr);
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skb_orphan(skb);
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last_desc = q->q.pidx + ndesc - 1;
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@ -1359,7 +1358,7 @@ out_free: dev_kfree_skb_any(skb);
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txq_advance(&q->q, ndesc);
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ring_tx_db(adap, &q->q, ndesc);
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cxgb4_ring_tx_db(adap, &q->q, ndesc);
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if (ptp_enabled)
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spin_unlock(&adap->ptp_lock);
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return NETDEV_TX_OK;
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@ -1369,9 +1368,9 @@ out_free: dev_kfree_skb_any(skb);
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* reclaim_completed_tx_imm - reclaim completed control-queue Tx descs
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* @q: the SGE control Tx queue
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*
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* This is a variant of reclaim_completed_tx() that is used for Tx queues
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* that send only immediate data (presently just the control queues) and
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* thus do not have any sk_buffs to release.
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* This is a variant of cxgb4_reclaim_completed_tx() that is used
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* for Tx queues that send only immediate data (presently just
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* the control queues) and thus do not have any sk_buffs to release.
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*/
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static inline void reclaim_completed_tx_imm(struct sge_txq *q)
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{
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@ -1446,13 +1445,13 @@ static int ctrl_xmit(struct sge_ctrl_txq *q, struct sk_buff *skb)
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}
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wr = (struct fw_wr_hdr *)&q->q.desc[q->q.pidx];
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inline_tx_skb(skb, &q->q, wr);
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cxgb4_inline_tx_skb(skb, &q->q, wr);
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txq_advance(&q->q, ndesc);
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if (unlikely(txq_avail(&q->q) < TXQ_STOP_THRES))
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ctrlq_check_stop(q, wr);
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ring_tx_db(q->adap, &q->q, ndesc);
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cxgb4_ring_tx_db(q->adap, &q->q, ndesc);
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spin_unlock(&q->sendq.lock);
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kfree_skb(skb);
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@ -1487,7 +1486,7 @@ static void restart_ctrlq(unsigned long data)
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txq_advance(&q->q, ndesc);
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spin_unlock(&q->sendq.lock);
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inline_tx_skb(skb, &q->q, wr);
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cxgb4_inline_tx_skb(skb, &q->q, wr);
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kfree_skb(skb);
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if (unlikely(txq_avail(&q->q) < TXQ_STOP_THRES)) {
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@ -1500,14 +1499,15 @@ static void restart_ctrlq(unsigned long data)
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}
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}
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if (written > 16) {
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ring_tx_db(q->adap, &q->q, written);
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cxgb4_ring_tx_db(q->adap, &q->q, written);
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written = 0;
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}
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spin_lock(&q->sendq.lock);
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}
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q->full = 0;
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ringdb: if (written)
|
||||
ring_tx_db(q->adap, &q->q, written);
|
||||
ringdb:
|
||||
if (written)
|
||||
cxgb4_ring_tx_db(q->adap, &q->q, written);
|
||||
spin_unlock(&q->sendq.lock);
|
||||
}
|
||||
|
||||
@ -1650,7 +1650,7 @@ static void service_ofldq(struct sge_uld_txq *q)
|
||||
*/
|
||||
spin_unlock(&q->sendq.lock);
|
||||
|
||||
reclaim_completed_tx(q->adap, &q->q, false);
|
||||
cxgb4_reclaim_completed_tx(q->adap, &q->q, false);
|
||||
|
||||
flits = skb->priority; /* previously saved */
|
||||
ndesc = flits_to_desc(flits);
|
||||
@ -1661,9 +1661,9 @@ static void service_ofldq(struct sge_uld_txq *q)
|
||||
|
||||
pos = (u64 *)&q->q.desc[q->q.pidx];
|
||||
if (is_ofld_imm(skb))
|
||||
inline_tx_skb(skb, &q->q, pos);
|
||||
else if (map_skb(q->adap->pdev_dev, skb,
|
||||
(dma_addr_t *)skb->head)) {
|
||||
cxgb4_inline_tx_skb(skb, &q->q, pos);
|
||||
else if (cxgb4_map_skb(q->adap->pdev_dev, skb,
|
||||
(dma_addr_t *)skb->head)) {
|
||||
txq_stop_maperr(q);
|
||||
spin_lock(&q->sendq.lock);
|
||||
break;
|
||||
@ -1694,9 +1694,9 @@ static void service_ofldq(struct sge_uld_txq *q)
|
||||
pos = (void *)txq->desc;
|
||||
}
|
||||
|
||||
write_sgl(skb, &q->q, (void *)pos,
|
||||
end, hdr_len,
|
||||
(dma_addr_t *)skb->head);
|
||||
cxgb4_write_sgl(skb, &q->q, (void *)pos,
|
||||
end, hdr_len,
|
||||
(dma_addr_t *)skb->head);
|
||||
#ifdef CONFIG_NEED_DMA_MAP_STATE
|
||||
skb->dev = q->adap->port[0];
|
||||
skb->destructor = deferred_unmap_destructor;
|
||||
@ -1710,7 +1710,7 @@ static void service_ofldq(struct sge_uld_txq *q)
|
||||
txq_advance(&q->q, ndesc);
|
||||
written += ndesc;
|
||||
if (unlikely(written > 32)) {
|
||||
ring_tx_db(q->adap, &q->q, written);
|
||||
cxgb4_ring_tx_db(q->adap, &q->q, written);
|
||||
written = 0;
|
||||
}
|
||||
|
||||
@ -1725,7 +1725,7 @@ static void service_ofldq(struct sge_uld_txq *q)
|
||||
kfree_skb(skb);
|
||||
}
|
||||
if (likely(written))
|
||||
ring_tx_db(q->adap, &q->q, written);
|
||||
cxgb4_ring_tx_db(q->adap, &q->q, written);
|
||||
|
||||
/*Indicate that no thread is processing the Pending Send Queue
|
||||
* currently.
|
||||
|
||||
@ -513,6 +513,13 @@ struct fw_ulptx_wr {
|
||||
u64 cookie;
|
||||
};
|
||||
|
||||
#define FW_ULPTX_WR_DATA_S 28
|
||||
#define FW_ULPTX_WR_DATA_M 0x1
|
||||
#define FW_ULPTX_WR_DATA_V(x) ((x) << FW_ULPTX_WR_DATA_S)
|
||||
#define FW_ULPTX_WR_DATA_G(x) \
|
||||
(((x) >> FW_ULPTX_WR_DATA_S) & FW_ULPTX_WR_DATA_M)
|
||||
#define FW_ULPTX_WR_DATA_F FW_ULPTX_WR_DATA_V(1U)
|
||||
|
||||
struct fw_tp_wr {
|
||||
__be32 op_to_immdlen;
|
||||
__be32 flowid_len16;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user