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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ath10k: vote for hardware resources for WCN3990
Add clock and regulator votes for WCN3990 WLAN chipset. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Govind Singh
Kalle Valo
parent
ea66b12e63
commit
a6a793f987
@ -24,6 +24,8 @@
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/clk.h>
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#define WCN3990_CE_ATTR_FLAGS 0
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#define ATH10K_SNOC_RX_POST_RETRY_MS 50
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#define CE_POLL_PIPE 4
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@ -43,6 +45,17 @@ static char *const ce_name[] = {
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"WLAN_CE_11",
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};
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static struct ath10k_wcn3990_vreg_info vreg_cfg[] = {
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{NULL, "vdd-0.8-cx-mx", 800000, 800000, 0, 0, false},
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{NULL, "vdd-1.8-xo", 1800000, 1800000, 0, 0, false},
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{NULL, "vdd-1.3-rfa", 1304000, 1304000, 0, 0, false},
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{NULL, "vdd-3.3-ch0", 3312000, 3312000, 0, 0, false},
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};
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static struct ath10k_wcn3990_clk_info clk_cfg[] = {
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{NULL, "cxo_ref_clk_pin", 0, false},
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};
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static void ath10k_snoc_htc_tx_cb(struct ath10k_ce_pipe *ce_state);
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static void ath10k_snoc_htt_tx_cb(struct ath10k_ce_pipe *ce_state);
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static void ath10k_snoc_htc_rx_cb(struct ath10k_ce_pipe *ce_state);
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@ -969,6 +982,277 @@ static void ath10k_snoc_release_resource(struct ath10k *ar)
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ath10k_ce_free_pipe(ar, i);
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}
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static int ath10k_get_vreg_info(struct ath10k *ar, struct device *dev,
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struct ath10k_wcn3990_vreg_info *vreg_info)
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{
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struct regulator *reg;
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int ret = 0;
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reg = devm_regulator_get_optional(dev, vreg_info->name);
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if (IS_ERR(reg)) {
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ret = PTR_ERR(reg);
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if (ret == -EPROBE_DEFER) {
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ath10k_err(ar, "EPROBE_DEFER for regulator: %s\n",
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vreg_info->name);
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return ret;
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}
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if (vreg_info->required) {
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ath10k_err(ar, "Regulator %s doesn't exist: %d\n",
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vreg_info->name, ret);
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return ret;
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}
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ath10k_dbg(ar, ATH10K_DBG_SNOC,
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"Optional regulator %s doesn't exist: %d\n",
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vreg_info->name, ret);
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goto done;
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}
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vreg_info->reg = reg;
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done:
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ath10k_dbg(ar, ATH10K_DBG_SNOC,
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"snog vreg %s min_v %u max_v %u load_ua %u settle_delay %lu\n",
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vreg_info->name, vreg_info->min_v, vreg_info->max_v,
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vreg_info->load_ua, vreg_info->settle_delay);
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return 0;
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}
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static int ath10k_get_clk_info(struct ath10k *ar, struct device *dev,
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struct ath10k_wcn3990_clk_info *clk_info)
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{
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struct clk *handle;
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int ret = 0;
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handle = devm_clk_get(dev, clk_info->name);
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if (IS_ERR(handle)) {
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ret = PTR_ERR(handle);
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if (clk_info->required) {
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ath10k_err(ar, "snoc clock %s isn't available: %d\n",
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clk_info->name, ret);
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return ret;
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}
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc ignoring clock %s: %d\n",
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clk_info->name,
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ret);
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return 0;
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}
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc clock %s freq %u\n",
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clk_info->name, clk_info->freq);
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clk_info->handle = handle;
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return ret;
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}
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static int ath10k_wcn3990_vreg_on(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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struct ath10k_wcn3990_vreg_info *vreg_info;
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int ret = 0;
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int i;
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for (i = 0; i < ARRAY_SIZE(vreg_cfg); i++) {
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vreg_info = &ar_snoc->vreg[i];
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if (!vreg_info->reg)
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continue;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc regulator %s being enabled\n",
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vreg_info->name);
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ret = regulator_set_voltage(vreg_info->reg, vreg_info->min_v,
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vreg_info->max_v);
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if (ret) {
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ath10k_err(ar,
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"failed to set regulator %s voltage-min: %d voltage-max: %d\n",
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vreg_info->name, vreg_info->min_v, vreg_info->max_v);
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goto err_reg_config;
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}
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if (vreg_info->load_ua) {
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ret = regulator_set_load(vreg_info->reg,
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vreg_info->load_ua);
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if (ret < 0) {
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ath10k_err(ar,
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"failed to set regulator %s load: %d\n",
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vreg_info->name,
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vreg_info->load_ua);
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goto err_reg_config;
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}
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}
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ret = regulator_enable(vreg_info->reg);
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if (ret) {
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ath10k_err(ar, "failed to enable regulator %s\n",
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vreg_info->name);
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goto err_reg_config;
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}
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if (vreg_info->settle_delay)
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udelay(vreg_info->settle_delay);
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}
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return 0;
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err_reg_config:
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for (; i >= 0; i--) {
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vreg_info = &ar_snoc->vreg[i];
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if (!vreg_info->reg)
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continue;
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regulator_disable(vreg_info->reg);
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regulator_set_load(vreg_info->reg, 0);
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regulator_set_voltage(vreg_info->reg, 0, vreg_info->max_v);
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}
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return ret;
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}
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static int ath10k_wcn3990_vreg_off(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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struct ath10k_wcn3990_vreg_info *vreg_info;
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int ret = 0;
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int i;
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for (i = ARRAY_SIZE(vreg_cfg) - 1; i >= 0; i--) {
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vreg_info = &ar_snoc->vreg[i];
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if (!vreg_info->reg)
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continue;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc regulator %s being disabled\n",
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vreg_info->name);
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ret = regulator_disable(vreg_info->reg);
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if (ret)
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ath10k_err(ar, "failed to disable regulator %s\n",
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vreg_info->name);
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ret = regulator_set_load(vreg_info->reg, 0);
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if (ret < 0)
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ath10k_err(ar, "failed to set load %s\n",
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vreg_info->name);
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ret = regulator_set_voltage(vreg_info->reg, 0,
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vreg_info->max_v);
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if (ret)
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ath10k_err(ar, "failed to set voltage %s\n",
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vreg_info->name);
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}
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return ret;
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}
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static int ath10k_wcn3990_clk_init(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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struct ath10k_wcn3990_clk_info *clk_info;
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int ret = 0;
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int i;
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for (i = 0; i < ARRAY_SIZE(clk_cfg); i++) {
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clk_info = &ar_snoc->clk[i];
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if (!clk_info->handle)
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continue;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc clock %s being enabled\n",
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clk_info->name);
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if (clk_info->freq) {
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ret = clk_set_rate(clk_info->handle, clk_info->freq);
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if (ret) {
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ath10k_err(ar, "failed to set clock %s freq %u\n",
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clk_info->name, clk_info->freq);
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goto err_clock_config;
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}
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}
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ret = clk_prepare_enable(clk_info->handle);
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if (ret) {
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ath10k_err(ar, "failed to enable clock %s\n",
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clk_info->name);
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goto err_clock_config;
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}
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}
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return 0;
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err_clock_config:
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for (; i >= 0; i--) {
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clk_info = &ar_snoc->clk[i];
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if (!clk_info->handle)
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continue;
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clk_disable_unprepare(clk_info->handle);
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}
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return ret;
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}
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static int ath10k_wcn3990_clk_deinit(struct ath10k *ar)
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{
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struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
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struct ath10k_wcn3990_clk_info *clk_info;
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int i;
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for (i = 0; i < ARRAY_SIZE(clk_cfg); i++) {
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clk_info = &ar_snoc->clk[i];
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if (!clk_info->handle)
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continue;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc clock %s being disabled\n",
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clk_info->name);
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clk_disable_unprepare(clk_info->handle);
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}
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return 0;
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}
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static int ath10k_hw_power_on(struct ath10k *ar)
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{
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int ret;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "soc power on\n");
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ret = ath10k_wcn3990_vreg_on(ar);
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if (ret)
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return ret;
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ret = ath10k_wcn3990_clk_init(ar);
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if (ret)
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goto vreg_off;
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return ret;
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vreg_off:
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ath10k_wcn3990_vreg_off(ar);
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return ret;
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}
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static int ath10k_hw_power_off(struct ath10k *ar)
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{
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int ret;
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "soc power off\n");
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ath10k_wcn3990_clk_deinit(ar);
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ret = ath10k_wcn3990_vreg_off(ar);
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return ret;
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}
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static const struct of_device_id ath10k_snoc_dt_match[] = {
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{ .compatible = "qcom,wcn3990-wifi",
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.data = &drv_priv,
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@ -985,6 +1269,7 @@ static int ath10k_snoc_probe(struct platform_device *pdev)
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struct device *dev;
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struct ath10k *ar;
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int ret;
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u32 i;
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of_id = of_match_device(ath10k_snoc_dt_match, &pdev->dev);
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if (!of_id) {
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@ -1031,16 +1316,41 @@ static int ath10k_snoc_probe(struct platform_device *pdev)
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ath10k_warn(ar, "failed to request irqs: %d\n", ret);
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goto err_release_resource;
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}
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ar_snoc->vreg = vreg_cfg;
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for (i = 0; i < ARRAY_SIZE(vreg_cfg); i++) {
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ret = ath10k_get_vreg_info(ar, dev, &ar_snoc->vreg[i]);
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if (ret)
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goto err_free_irq;
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}
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ar_snoc->clk = clk_cfg;
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for (i = 0; i < ARRAY_SIZE(clk_cfg); i++) {
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ret = ath10k_get_clk_info(ar, dev, &ar_snoc->clk[i]);
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if (ret)
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goto err_free_irq;
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}
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ret = ath10k_hw_power_on(ar);
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if (ret) {
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ath10k_err(ar, "failed to power on device: %d\n", ret);
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goto err_free_irq;
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}
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ret = ath10k_core_register(ar, drv_data->hw_rev);
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if (ret) {
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ath10k_err(ar, "failed to register driver core: %d\n", ret);
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goto err_free_irq;
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goto err_hw_power_off;
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}
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc probe\n");
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ath10k_warn(ar, "Warning: SNOC support is still work-in-progress, it will not work properly!");
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return 0;
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err_hw_power_off:
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ath10k_hw_power_off(ar);
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err_free_irq:
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ath10k_snoc_free_irq(ar);
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@ -1059,6 +1369,7 @@ static int ath10k_snoc_remove(struct platform_device *pdev)
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ath10k_dbg(ar, ATH10K_DBG_SNOC, "snoc remove\n");
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ath10k_core_unregister(ar);
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ath10k_hw_power_off(ar);
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ath10k_snoc_free_irq(ar);
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ath10k_snoc_release_resource(ar);
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ath10k_core_destroy(ar);
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@ -52,6 +52,23 @@ struct ath10k_snoc_ce_irq {
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u32 irq_line;
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};
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struct ath10k_wcn3990_vreg_info {
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struct regulator *reg;
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const char *name;
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u32 min_v;
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u32 max_v;
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u32 load_ua;
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unsigned long settle_delay;
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bool required;
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};
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struct ath10k_wcn3990_clk_info {
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struct clk *handle;
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const char *name;
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u32 freq;
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bool required;
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};
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struct ath10k_snoc {
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struct platform_device *dev;
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struct ath10k *ar;
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@ -63,6 +80,8 @@ struct ath10k_snoc {
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struct ath10k_snoc_ce_irq ce_irqs[CE_COUNT_MAX];
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struct ath10k_ce ce;
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struct timer_list rx_post_retry;
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struct ath10k_wcn3990_vreg_info *vreg;
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struct ath10k_wcn3990_clk_info *clk;
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};
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static inline struct ath10k_snoc *ath10k_snoc_priv(struct ath10k *ar)
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