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media: vsp1: drm: Implement writeback support
Extend the vsp1_du_atomic_flush() API with writeback support by adding format, pitch and memory addresses of the writeback framebuffer. Writeback completion is reported through the existing frame completion callback with a new VSP1_DU_STATUS_WRITEBACK status flag. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -958,6 +958,9 @@ void vsp1_dl_list_commit(struct vsp1_dl_list *dl, unsigned int dl_flags)
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*
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* The VSP1_DL_FRAME_END_INTERNAL flag indicates that the display list that just
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* became active had been queued with the internal notification flag.
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*
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* The VSP1_DL_FRAME_END_WRITEBACK flag indicates that the previously active
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* display list had been queued with the writeback flag.
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*/
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unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
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{
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@ -995,6 +998,17 @@ unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
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if (status & VI6_STATUS_FLD_STD(dlm->index))
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goto done;
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/*
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* If the active display list has the writeback flag set, the frame
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* completion marks the end of the writeback capture. Return the
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* VSP1_DL_FRAME_END_WRITEBACK flag and reset the display list's
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* writeback flag.
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*/
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if (dlm->active && (dlm->active->flags & VSP1_DL_FRAME_END_WRITEBACK)) {
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flags |= VSP1_DL_FRAME_END_WRITEBACK;
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dlm->active->flags &= ~VSP1_DL_FRAME_END_WRITEBACK;
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}
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/*
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* The device starts processing the queued display list right after the
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* frame end interrupt. The display list thus becomes active.
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@ -19,7 +19,8 @@ struct vsp1_dl_manager;
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/* Keep these flags in sync with VSP1_DU_STATUS_* in include/media/vsp1.h. */
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#define VSP1_DL_FRAME_END_COMPLETED BIT(0)
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#define VSP1_DL_FRAME_END_INTERNAL BIT(1)
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#define VSP1_DL_FRAME_END_WRITEBACK BIT(1)
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#define VSP1_DL_FRAME_END_INTERNAL BIT(2)
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/**
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* struct vsp1_dl_ext_cmd - Extended Display command
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@ -37,7 +37,9 @@ static void vsp1_du_pipeline_frame_end(struct vsp1_pipeline *pipe,
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if (drm_pipe->du_complete) {
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struct vsp1_entity *uif = drm_pipe->uif;
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unsigned int status = completion & VSP1_DU_STATUS_COMPLETE;
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unsigned int status = completion
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& (VSP1_DU_STATUS_COMPLETE |
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VSP1_DU_STATUS_WRITEBACK);
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u32 crc;
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crc = uif ? vsp1_uif_get_crc(to_uif(&uif->subdev)) : 0;
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@ -541,6 +543,8 @@ static void vsp1_du_pipeline_configure(struct vsp1_pipeline *pipe)
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if (drm_pipe->force_brx_release)
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dl_flags |= VSP1_DL_FRAME_END_INTERNAL;
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if (pipe->output->writeback)
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dl_flags |= VSP1_DL_FRAME_END_WRITEBACK;
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dl = vsp1_dl_list_get(pipe->output->dlm);
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dlb = vsp1_dl_list_get_body0(dl);
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@ -870,12 +874,31 @@ void vsp1_du_atomic_flush(struct device *dev, unsigned int pipe_index,
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];
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struct vsp1_pipeline *pipe = &drm_pipe->pipe;
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int ret;
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drm_pipe->crc = cfg->crc;
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mutex_lock(&vsp1->drm->lock);
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if (cfg->writeback.pixelformat) {
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const struct vsp1_du_writeback_config *wb_cfg = &cfg->writeback;
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ret = vsp1_du_pipeline_set_rwpf_format(vsp1, pipe->output,
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wb_cfg->pixelformat,
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wb_cfg->pitch);
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if (WARN_ON(ret < 0))
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goto done;
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pipe->output->mem.addr[0] = wb_cfg->mem[0];
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pipe->output->mem.addr[1] = wb_cfg->mem[1];
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pipe->output->mem.addr[2] = wb_cfg->mem[2];
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pipe->output->writeback = true;
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}
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vsp1_du_pipeline_setup_inputs(vsp1, pipe);
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vsp1_du_pipeline_configure(pipe);
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done:
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mutex_unlock(&vsp1->drm->lock);
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}
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EXPORT_SYMBOL_GPL(vsp1_du_atomic_flush);
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@ -18,6 +18,7 @@ struct device;
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int vsp1_du_init(struct device *dev);
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#define VSP1_DU_STATUS_COMPLETE BIT(0)
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#define VSP1_DU_STATUS_WRITEBACK BIT(1)
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/**
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* struct vsp1_du_lif_config - VSP LIF configuration
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@ -83,12 +84,26 @@ struct vsp1_du_crc_config {
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unsigned int index;
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};
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/**
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* struct vsp1_du_writeback_config - VSP writeback configuration parameters
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* @pixelformat: plane pixel format (V4L2 4CC)
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* @pitch: line pitch in bytes for the first plane
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* @mem: DMA memory address for each plane of the frame buffer
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*/
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struct vsp1_du_writeback_config {
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u32 pixelformat;
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unsigned int pitch;
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dma_addr_t mem[3];
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};
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/**
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* struct vsp1_du_atomic_pipe_config - VSP atomic pipe configuration parameters
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* @crc: CRC computation configuration
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* @writeback: writeback configuration
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*/
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struct vsp1_du_atomic_pipe_config {
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struct vsp1_du_crc_config crc;
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struct vsp1_du_writeback_config writeback;
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};
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void vsp1_du_atomic_begin(struct device *dev, unsigned int pipe_index);
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