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Input: tsc2005 - improve readability of register defines
Improve defines for first control byte by removing 0x00 prefix (the defines are for 8 bit values and not for 16 bit values) and expose register structure by exposing the shift. Signed-off-by: Sebastian Reichel <sre@kernel.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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@ -61,16 +61,24 @@
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#define TSC2005_CMD_12BIT 0x04
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/* control byte 0 */
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#define TSC2005_REG_READ 0x0001
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#define TSC2005_REG_PND0 0x0002
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#define TSC2005_REG_X 0x0000
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#define TSC2005_REG_Y 0x0008
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#define TSC2005_REG_Z1 0x0010
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#define TSC2005_REG_Z2 0x0018
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#define TSC2005_REG_TEMP_HIGH 0x0050
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#define TSC2005_REG_CFR0 0x0060
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#define TSC2005_REG_CFR1 0x0068
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#define TSC2005_REG_CFR2 0x0070
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#define TSC2005_REG_READ 0x01 /* R/W access */
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#define TSC2005_REG_PND0 0x02 /* Power Not Down Control */
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#define TSC2005_REG_X (0x0 << 3)
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#define TSC2005_REG_Y (0x1 << 3)
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#define TSC2005_REG_Z1 (0x2 << 3)
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#define TSC2005_REG_Z2 (0x3 << 3)
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#define TSC2005_REG_AUX (0x4 << 3)
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#define TSC2005_REG_TEMP1 (0x5 << 3)
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#define TSC2005_REG_TEMP2 (0x6 << 3)
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#define TSC2005_REG_STATUS (0x7 << 3)
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#define TSC2005_REG_AUX_HIGH (0x8 << 3)
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#define TSC2005_REG_AUX_LOW (0x9 << 3)
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#define TSC2005_REG_TEMP_HIGH (0xA << 3)
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#define TSC2005_REG_TEMP_LOW (0xB << 3)
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#define TSC2005_REG_CFR0 (0xC << 3)
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#define TSC2005_REG_CFR1 (0xD << 3)
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#define TSC2005_REG_CFR2 (0xE << 3)
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#define TSC2005_REG_CONV_FUNC (0xF << 3)
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/* configuration register 0 */
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#define TSC2005_CFR0_PRECHARGE_276US 0x0040
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