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drm/i915/icl: Add WaDisableBankHangMode

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Disable GPU hang by default on unrecoverable ECC cache errors.

v2:
 * Rebase.

v3:
 * Use intel_uncore_read. (Chris)

Fixes: cc38cae7c4 ("drm/i915/icl: Introduce initial Icelake Workarounds")
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190520110442.403-2-tvrtko.ursulin@linux.intel.com
(cherry picked from commit cbe3e1d103)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
This commit is contained in:
Tvrtko Ursulin 2019-05-20 12:04:42 +01:00 committed by Joonas Lahtinen
parent cd6c84d8f0
commit a6315005a2
2 changed files with 9 additions and 0 deletions
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3
drivers/gpu/drm/i915/i915_reg.h
View File

@ -7620,6 +7620,9 @@ enum {
#define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION (1 << 8)
#define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1 << 0)
#define GEN8_L3CNTLREG _MMIO(0x7034)
#define GEN8_ERRDETBCTRL (1 << 9)
#define GEN11_COMMON_SLICE_CHICKEN3 _MMIO(0x7304)
#define GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC (1 << 11)

6
drivers/gpu/drm/i915/intel_workarounds.c
View File

@ -518,6 +518,12 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *wal = &engine->ctx_wa_list;
/* WaDisableBankHangMode:icl */
wa_write(wal,
GEN8_L3CNTLREG,
intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
GEN8_ERRDETBCTRL);
/* Wa_1604370585:icl (pre-prod)
* Formerly known as WaPushConstantDereferenceHoldDisable
*/