mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 02:40:54 +07:00
drivers/gpio: gpio-nomadik: Add support for irqdomains
Add irq domain support to the gpio-nomadik GPIO driver. This enables its users to support dynamic IRQ assignment, which is requried by Device Tree. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Lee Jones
Linus Walleij
parent
513c27f84e
commit
a60b57edda
@ -30,6 +30,18 @@
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void __iomem *_PRCMU_BASE;
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/*
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* FIXME: Should we set up the GPIO domain here?
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*
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* The problem is that we cannot put the interrupt resources into the platform
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* device until the irqdomain has been added. Right now, we set the GIC interrupt
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* domain from init_irq(), then load the gpio driver from
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* core_initcall(nmk_gpio_init) and add the platform devices from
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* arch_initcall(customize_machine).
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*
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* This feels fragile because it depends on the gpio device getting probed
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* _before_ any device uses the gpio interrupts.
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*/
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static const struct of_device_id ux500_dt_irq_match[] = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
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{},
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@ -22,6 +22,7 @@
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/slab.h>
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#include <asm/mach/irq.h>
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@ -41,6 +42,7 @@
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struct nmk_gpio_chip {
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struct gpio_chip chip;
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struct irq_domain *domain;
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void __iomem *addr;
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struct clk *clk;
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unsigned int bank;
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@ -393,7 +395,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
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struct nmk_gpio_chip *nmk_chip;
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int pin = PIN_NUM(cfgs[i]);
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nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
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nmk_chip = nmk_gpio_chips[pin / NMK_GPIO_PER_CHIP];
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if (!nmk_chip) {
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ret = -EINVAL;
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break;
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@ -401,7 +403,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
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clk_enable(nmk_chip->clk);
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spin_lock(&nmk_chip->lock);
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__nmk_config_pin(nmk_chip, pin - nmk_chip->chip.base,
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__nmk_config_pin(nmk_chip, pin % NMK_GPIO_PER_CHIP,
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cfgs[i], sleep, glitch ? slpm : NULL);
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spin_unlock(&nmk_chip->lock);
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clk_disable(nmk_chip->clk);
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@ -485,7 +487,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
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struct nmk_gpio_chip *nmk_chip;
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unsigned long flags;
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nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
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nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
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if (!nmk_chip)
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return -EINVAL;
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@ -493,7 +495,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
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spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
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spin_lock(&nmk_chip->lock);
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__nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
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__nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP, mode);
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spin_unlock(&nmk_chip->lock);
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spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
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@ -520,13 +522,13 @@ int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
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struct nmk_gpio_chip *nmk_chip;
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unsigned long flags;
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nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
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nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
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if (!nmk_chip)
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return -EINVAL;
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_chip->lock, flags);
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__nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
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__nmk_gpio_set_pull(nmk_chip, gpio % NMK_GPIO_PER_CHIP, pull);
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spin_unlock_irqrestore(&nmk_chip->lock, flags);
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clk_disable(nmk_chip->clk);
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@ -548,13 +550,13 @@ int nmk_gpio_set_mode(int gpio, int gpio_mode)
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struct nmk_gpio_chip *nmk_chip;
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unsigned long flags;
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nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
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nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
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if (!nmk_chip)
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return -EINVAL;
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_chip->lock, flags);
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__nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
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__nmk_gpio_set_mode(nmk_chip, gpio % NMK_GPIO_PER_CHIP, gpio_mode);
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spin_unlock_irqrestore(&nmk_chip->lock, flags);
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clk_disable(nmk_chip->clk);
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@ -567,11 +569,11 @@ int nmk_gpio_get_mode(int gpio)
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struct nmk_gpio_chip *nmk_chip;
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u32 afunc, bfunc, bit;
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nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
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nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
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if (!nmk_chip)
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return -EINVAL;
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bit = 1 << (gpio - nmk_chip->chip.base);
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bit = 1 << (gpio % NMK_GPIO_PER_CHIP);
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clk_enable(nmk_chip->clk);
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@ -588,21 +590,19 @@ EXPORT_SYMBOL(nmk_gpio_get_mode);
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/* IRQ functions */
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static inline int nmk_gpio_get_bitmask(int gpio)
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{
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return 1 << (gpio % 32);
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return 1 << (gpio % NMK_GPIO_PER_CHIP);
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}
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static void nmk_gpio_irq_ack(struct irq_data *d)
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{
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int gpio;
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struct nmk_gpio_chip *nmk_chip;
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gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
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nmk_chip = irq_data_get_irq_chip_data(d);
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if (!nmk_chip)
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return;
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clk_enable(nmk_chip->clk);
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writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
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writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
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clk_disable(nmk_chip->clk);
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}
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@ -659,7 +659,7 @@ static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
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* wakeup is anyhow controlled by the RIMSC and FIMSC registers.
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*/
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if (nmk_chip->sleepmode && on) {
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__nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base,
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__nmk_gpio_set_slpm(nmk_chip, gpio % nmk_chip->chip.base,
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NMK_GPIO_SLPM_WAKEUP_ENABLE);
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}
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@ -668,14 +668,12 @@ static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
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static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
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{
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int gpio;
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struct nmk_gpio_chip *nmk_chip;
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unsigned long flags;
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u32 bitmask;
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gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
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nmk_chip = irq_data_get_irq_chip_data(d);
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bitmask = nmk_gpio_get_bitmask(gpio);
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bitmask = nmk_gpio_get_bitmask(d->hwirq);
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if (!nmk_chip)
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return -EINVAL;
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@ -683,10 +681,10 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
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spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
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spin_lock(&nmk_chip->lock);
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__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable);
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__nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable);
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if (!(nmk_chip->real_wake & bitmask))
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__nmk_gpio_set_wake(nmk_chip, gpio, enable);
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__nmk_gpio_set_wake(nmk_chip, d->hwirq, enable);
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spin_unlock(&nmk_chip->lock);
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spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
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@ -710,20 +708,18 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
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struct nmk_gpio_chip *nmk_chip;
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unsigned long flags;
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u32 bitmask;
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int gpio;
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gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
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nmk_chip = irq_data_get_irq_chip_data(d);
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if (!nmk_chip)
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return -EINVAL;
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bitmask = nmk_gpio_get_bitmask(gpio);
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bitmask = nmk_gpio_get_bitmask(d->hwirq);
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clk_enable(nmk_chip->clk);
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spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
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spin_lock(&nmk_chip->lock);
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if (irqd_irq_disabled(d))
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__nmk_gpio_set_wake(nmk_chip, gpio, on);
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__nmk_gpio_set_wake(nmk_chip, d->hwirq, on);
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if (on)
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nmk_chip->real_wake |= bitmask;
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@ -741,17 +737,14 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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{
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bool enabled = !irqd_irq_disabled(d);
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bool wake = irqd_is_wakeup_set(d);
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int gpio;
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struct nmk_gpio_chip *nmk_chip;
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unsigned long flags;
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u32 bitmask;
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gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
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nmk_chip = irq_data_get_irq_chip_data(d);
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bitmask = nmk_gpio_get_bitmask(gpio);
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bitmask = nmk_gpio_get_bitmask(d->hwirq);
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if (!nmk_chip)
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return -EINVAL;
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if (type & IRQ_TYPE_LEVEL_HIGH)
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return -EINVAL;
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if (type & IRQ_TYPE_LEVEL_LOW)
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@ -761,10 +754,10 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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spin_lock_irqsave(&nmk_chip->lock, flags);
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if (enabled)
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__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
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__nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false);
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if (enabled || wake)
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__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
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__nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false);
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nmk_chip->edge_rising &= ~bitmask;
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if (type & IRQ_TYPE_EDGE_RISING)
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@ -775,10 +768,10 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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nmk_chip->edge_falling |= bitmask;
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if (enabled)
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__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
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__nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true);
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if (enabled || wake)
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__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
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__nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true);
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spin_unlock_irqrestore(&nmk_chip->lock, flags);
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clk_disable(nmk_chip->clk);
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@ -824,7 +817,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
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chained_irq_enter(host_chip, desc);
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nmk_chip = irq_get_handler_data(irq);
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first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
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first_irq = nmk_chip->domain->revmap_data.legacy.first_irq;
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while (status) {
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int bit = __ffs(status);
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@ -858,18 +851,6 @@ static void nmk_gpio_secondary_irq_handler(unsigned int irq,
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static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
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{
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unsigned int first_irq;
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int i;
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first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
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for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
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irq_set_chip_and_handler(i, &nmk_gpio_irq_chip,
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handle_edge_irq);
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set_irq_flags(i, IRQF_VALID);
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irq_set_chip_data(i, nmk_chip);
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irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
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}
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irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
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irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
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@ -946,7 +927,7 @@ static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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struct nmk_gpio_chip *nmk_chip =
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container_of(chip, struct nmk_gpio_chip, chip);
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return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
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return irq_find_mapping(nmk_chip->domain, offset);
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}
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#ifdef CONFIG_DEBUG_FS
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@ -1129,6 +1110,27 @@ void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
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}
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}
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int nmk_gpio_irq_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct nmk_gpio_chip *nmk_chip = d->host_data;
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if (!nmk_chip)
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return -EINVAL;
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irq_set_chip_and_handler(irq, &nmk_gpio_irq_chip, handle_edge_irq);
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set_irq_flags(irq, IRQF_VALID);
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irq_set_chip_data(irq, nmk_chip);
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irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
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return 0;
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}
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const struct irq_domain_ops nmk_gpio_irq_simple_ops = {
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.map = nmk_gpio_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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static int __devinit nmk_gpio_probe(struct platform_device *dev)
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{
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struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
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@ -1158,7 +1160,7 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
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if (of_property_read_u32(np, "gpio-bank", &dev->id)) {
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dev_err(&dev->dev, "gpio-bank property not found\n");
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ret = -EINVAL;
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goto out_dt;
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goto out;
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}
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pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP;
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@ -1245,6 +1247,15 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
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platform_set_drvdata(dev, nmk_chip);
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nmk_chip->domain = irq_domain_add_legacy(np, NMK_GPIO_PER_CHIP,
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NOMADIK_GPIO_TO_IRQ(pdata->first_gpio),
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0, &nmk_gpio_irq_simple_ops, nmk_chip);
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if (!nmk_chip->domain) {
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pr_err("%s: Failed to create irqdomain\n", np->full_name);
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ret = -ENOSYS;
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goto out_free;
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}
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nmk_gpio_init_irq(nmk_chip);
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dev_info(&dev->dev, "at address %p\n", nmk_chip->addr);
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@ -1263,7 +1274,6 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
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out:
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dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
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pdata->first_gpio, pdata->first_gpio+31);
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out_dt:
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if (np)
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kfree(pdata);
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