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media: staging: rkisp1: cap: fix value written to uv swap register in selfpath

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The value RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP should be
set to the register instead of masking with ~BIT(1)

Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Acked-by: Helen Koike <helen.koike@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Dafna Hirschfeld 2020-04-11 18:05:58 +02:00 committed by Mauro Carvalho Chehab
parent ceb348690e
commit a557c3fa96
1 changed files with 2 additions and 2 deletions
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4
drivers/staging/media/rkisp1/rkisp1-capture.c
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@ -423,8 +423,8 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap)
if (cap->pix.cfg->uv_swap) {
u32 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
rkisp1_write(rkisp1, reg & ~BIT(1),
RKISP1_CIF_MI_XTD_FORMAT_CTRL);
reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP;
rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
}
rkisp1_mi_config_ctrl(cap);