mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 14:30:53 +07:00
Merge branch 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
* 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91: drop ide driver in favor of the pata one pata/at91: use newly introduced SMC accessors ARM: at91: add accessor to manage SMC ARM: at91:rtc/rtc-at91sam9: ioremap register bank ARM: at91: USB AT91 gadget registration for module
This commit is contained in:
Arnd Bergmann
commit
a5368e770c
@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
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* USB Device (Gadget)
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* -------------------------------------------------------------------- */
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#ifdef CONFIG_USB_AT91
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#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
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static struct at91_udc_data udc_data;
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static struct resource udc_resources[] = {
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@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
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* USB Device (Gadget)
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* -------------------------------------------------------------------- */
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#ifdef CONFIG_USB_AT91
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#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
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static struct at91_udc_data udc_data;
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static struct resource udc_resources[] = {
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@ -1215,8 +1215,7 @@ void __init at91_add_device_serial(void) {}
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* CF/IDE
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
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defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
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#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
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defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
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static struct at91_cf_data cf0_data;
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@ -1313,10 +1312,8 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
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if (data->flags & AT91_CF_TRUE_IDE)
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#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
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pdev->name = "pata_at91";
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#elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
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pdev->name = "at91_ide";
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#else
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#warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
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#warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
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#endif
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else
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pdev->name = "at91_cf";
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@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
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* USB Device (Gadget)
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* -------------------------------------------------------------------- */
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#ifdef CONFIG_USB_AT91
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#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
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static struct at91_udc_data udc_data;
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static struct resource udc_resources[] = {
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@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
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* USB Device (Gadget)
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* -------------------------------------------------------------------- */
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#ifdef CONFIG_USB_AT91
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#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
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static struct at91_udc_data udc_data;
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static struct resource udc_resources[] = {
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@ -355,8 +355,8 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
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* Compact Flash (PCMCIA or IDE)
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
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defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
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#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
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defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
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static struct at91_cf_data cf0_data;
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@ -450,7 +450,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
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at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
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at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
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pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
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pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
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platform_device_register(pdev);
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}
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#else
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@ -18,6 +18,35 @@
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#include <mach/cpu.h>
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#ifndef __ASSEMBLY__
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struct sam9_smc_config {
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/* Setup register */
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u8 ncs_read_setup;
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u8 nrd_setup;
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u8 ncs_write_setup;
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u8 nwe_setup;
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/* Pulse register */
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u8 ncs_read_pulse;
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u8 nrd_pulse;
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u8 ncs_write_pulse;
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u8 nwe_pulse;
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/* Cycle register */
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u16 read_cycle;
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u16 write_cycle;
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/* Mode register */
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u32 mode;
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u8 tdf_cycles:4;
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};
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extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config);
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extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config);
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extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config);
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extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config);
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#endif
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#define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */
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#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
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#define AT91_SMC_NWESETUP_(x) ((x) << 0)
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@ -2,6 +2,7 @@
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* linux/arch/arm/mach-at91/sam9_smc.c
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*
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* Copyright (C) 2008 Andrew Victor
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* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -22,7 +23,22 @@
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static void __iomem *smc_base_addr[2];
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static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config)
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static void sam9_smc_cs_write_mode(void __iomem *base,
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struct sam9_smc_config *config)
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{
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__raw_writel(config->mode
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| AT91_SMC_TDF_(config->tdf_cycles),
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base + AT91_SMC_MODE);
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}
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void sam9_smc_write_mode(int id, int cs,
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struct sam9_smc_config *config)
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{
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sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
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}
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static void sam9_smc_cs_configure(void __iomem *base,
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struct sam9_smc_config *config)
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{
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/* Setup register */
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@ -45,16 +61,66 @@ static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_con
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base + AT91_SMC_CYCLE);
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/* Mode register */
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__raw_writel(config->mode
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| AT91_SMC_TDF_(config->tdf_cycles),
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base + AT91_SMC_MODE);
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sam9_smc_cs_write_mode(base, config);
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}
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void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config)
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void sam9_smc_configure(int id, int cs,
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struct sam9_smc_config *config)
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{
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sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
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}
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static void sam9_smc_cs_read_mode(void __iomem *base,
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struct sam9_smc_config *config)
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{
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u32 val = __raw_readl(base + AT91_SMC_MODE);
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config->mode = (val & ~AT91_SMC_NWECYCLE);
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config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
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}
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void sam9_smc_read_mode(int id, int cs,
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struct sam9_smc_config *config)
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{
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sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
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}
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static void sam9_smc_cs_read(void __iomem *base,
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struct sam9_smc_config *config)
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{
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u32 val;
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/* Setup register */
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val = __raw_readl(base + AT91_SMC_SETUP);
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config->nwe_setup = val & AT91_SMC_NWESETUP;
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config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
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config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
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config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
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/* Pulse register */
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val = __raw_readl(base + AT91_SMC_PULSE);
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config->nwe_setup = val & AT91_SMC_NWEPULSE;
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config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
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config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
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config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
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/* Cycle register */
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val = __raw_readl(base + AT91_SMC_CYCLE);
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config->write_cycle = val & AT91_SMC_NWECYCLE;
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config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
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/* Mode register */
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sam9_smc_cs_read_mode(base, config);
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}
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void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)
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{
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sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);
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}
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void __init at91sam9_ioremap_smc(int id, u32 addr)
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{
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if (id > 1) {
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@ -8,27 +8,4 @@
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* published by the Free Software Foundation.
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*/
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struct sam9_smc_config {
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/* Setup register */
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u8 ncs_read_setup;
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u8 nrd_setup;
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u8 ncs_write_setup;
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u8 nwe_setup;
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/* Pulse register */
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u8 ncs_read_pulse;
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u8 nrd_pulse;
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u8 ncs_write_pulse;
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u8 nwe_pulse;
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/* Cycle register */
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u16 read_cycle;
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u16 write_cycle;
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/* Mode register */
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u32 mode;
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u8 tdf_cycles:4;
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};
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extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config);
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extern void __init at91sam9_ioremap_smc(int id, u32 addr);
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@ -207,11 +207,11 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
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{
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int ret = 0;
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int use_iordy;
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struct sam9_smc_config smc;
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unsigned int t6z; /* data tristate time in ns */
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unsigned int cycle; /* SMC Cycle width in MCK ticks */
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unsigned int setup; /* SMC Setup width in MCK ticks */
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unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */
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unsigned int cs_setup = 0;/* CS4 or CS5 setup width in MCK ticks */
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unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/
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unsigned int tdf_cycles; /* SMC TDF MCK ticks */
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unsigned long mck_hz; /* MCK frequency in Hz */
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@ -244,26 +244,20 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
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}
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dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
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info->mode |= AT91_SMC_TDF_(tdf_cycles);
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/* write SMC Setup Register */
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at91_sys_write(AT91_SMC_SETUP(info->cs),
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AT91_SMC_NWESETUP_(setup) |
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AT91_SMC_NRDSETUP_(setup) |
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AT91_SMC_NCS_WRSETUP_(cs_setup) |
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AT91_SMC_NCS_RDSETUP_(cs_setup));
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/* write SMC Pulse Register */
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at91_sys_write(AT91_SMC_PULSE(info->cs),
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AT91_SMC_NWEPULSE_(pulse) |
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AT91_SMC_NRDPULSE_(pulse) |
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AT91_SMC_NCS_WRPULSE_(cs_pulse) |
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AT91_SMC_NCS_RDPULSE_(cs_pulse));
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/* write SMC Cycle Register */
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at91_sys_write(AT91_SMC_CYCLE(info->cs),
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AT91_SMC_NWECYCLE_(cycle) |
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AT91_SMC_NRDCYCLE_(cycle));
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/* write SMC Mode Register*/
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at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
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/* SMC Setup Register */
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smc.nwe_setup = smc.nrd_setup = setup;
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smc.ncs_write_setup = smc.ncs_read_setup = 0;
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/* SMC Pulse Register */
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smc.nwe_pulse = smc.nrd_pulse = pulse;
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smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
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/* SMC Cycle Register */
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smc.write_cycle = smc.read_cycle = cycle;
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/* SMC Mode Register*/
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smc.tdf_cycles = tdf_cycles;
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smc.mode = info->mode;
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sam9_smc_configure(0, info->cs, &smc);
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}
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static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
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@ -288,20 +282,20 @@ static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
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struct at91_ide_info *info = dev->link->ap->host->private_data;
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unsigned int consumed;
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unsigned long flags;
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unsigned int mode;
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struct sam9_smc_config smc;
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local_irq_save(flags);
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mode = at91_sys_read(AT91_SMC_MODE(info->cs));
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sam9_smc_read_mode(0, info->cs, &smc);
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/* set 16bit mode before writing data */
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at91_sys_write(AT91_SMC_MODE(info->cs),
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(mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16);
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smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
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sam9_smc_write_mode(0, info->cs, &smc);
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consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
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/* restore 8bit mode after data is written */
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at91_sys_write(AT91_SMC_MODE(info->cs),
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(mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8);
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smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
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sam9_smc_write_mode(0, info->cs, &smc);
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local_irq_restore(flags);
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return consumed;
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@ -116,4 +116,3 @@ obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
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obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o
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obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o
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obj-$(CONFIG_BLK_DEV_IDE_AT91) += at91_ide.o
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@ -1,366 +0,0 @@
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/*
|
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* IDE host driver for AT91 (SAM9, CAP9, AT572D940HF) Static Memory Controller
|
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* with Compact Flash True IDE logic
|
||||
*
|
||||
* Copyright (c) 2008, 2009 Kelvatek Ltd.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
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#include <linux/module.h>
|
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#include <linux/clk.h>
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#include <linux/err.h>
|
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#include <linux/ide.h>
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#include <linux/platform_device.h>
|
||||
|
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#include <mach/board.h>
|
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#include <asm/gpio.h>
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#include <mach/at91sam9_smc.h>
|
||||
|
||||
#define DRV_NAME "at91_ide"
|
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|
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#define perr(fmt, args...) pr_err(DRV_NAME ": " fmt, ##args)
|
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#define pdbg(fmt, args...) pr_debug("%s " fmt, __func__, ##args)
|
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|
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/*
|
||||
* Access to IDE device is possible through EBI Static Memory Controller
|
||||
* with Compact Flash logic. For details see EBI and SMC datasheet sections
|
||||
* of any microcontroller from AT91SAM9 family.
|
||||
*
|
||||
* Within SMC chip select address space, lines A[23:21] distinguish Compact
|
||||
* Flash modes (I/O, common memory, attribute memory, True IDE). IDE modes are:
|
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* 0x00c0000 - True IDE
|
||||
* 0x00e0000 - Alternate True IDE (Alt Status Register)
|
||||
*
|
||||
* On True IDE mode Task File and Data Register are mapped at the same address.
|
||||
* To distinguish access between these two different bus data width is used:
|
||||
* 8Bit for Task File, 16Bit for Data I/O.
|
||||
*
|
||||
* After initialization we do 8/16 bit flipping (changes in SMC MODE register)
|
||||
* only inside IDE callback routines which are serialized by IDE layer,
|
||||
* so no additional locking needed.
|
||||
*/
|
||||
|
||||
#define TASK_FILE 0x00c00000
|
||||
#define ALT_MODE 0x00e00000
|
||||
#define REGS_SIZE 8
|
||||
|
||||
#define enter_16bit(cs, mode) do { \
|
||||
mode = at91_sys_read(AT91_SMC_MODE(cs)); \
|
||||
at91_sys_write(AT91_SMC_MODE(cs), mode | AT91_SMC_DBW_16); \
|
||||
} while (0)
|
||||
|
||||
#define leave_16bit(cs, mode) at91_sys_write(AT91_SMC_MODE(cs), mode);
|
||||
|
||||
static void set_smc_timings(const u8 chipselect, const u16 cycle,
|
||||
const u16 setup, const u16 pulse,
|
||||
const u16 data_float, int use_iordy)
|
||||
{
|
||||
unsigned long mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
|
||||
AT91_SMC_BAT_SELECT;
|
||||
|
||||
/* disable or enable waiting for IORDY signal */
|
||||
if (use_iordy)
|
||||
mode |= AT91_SMC_EXNWMODE_READY;
|
||||
|
||||
/* add data float cycles if needed */
|
||||
if (data_float)
|
||||
mode |= AT91_SMC_TDF_(data_float);
|
||||
|
||||
at91_sys_write(AT91_SMC_MODE(chipselect), mode);
|
||||
|
||||
/* setup timings in SMC */
|
||||
at91_sys_write(AT91_SMC_SETUP(chipselect), AT91_SMC_NWESETUP_(setup) |
|
||||
AT91_SMC_NCS_WRSETUP_(0) |
|
||||
AT91_SMC_NRDSETUP_(setup) |
|
||||
AT91_SMC_NCS_RDSETUP_(0));
|
||||
at91_sys_write(AT91_SMC_PULSE(chipselect), AT91_SMC_NWEPULSE_(pulse) |
|
||||
AT91_SMC_NCS_WRPULSE_(cycle) |
|
||||
AT91_SMC_NRDPULSE_(pulse) |
|
||||
AT91_SMC_NCS_RDPULSE_(cycle));
|
||||
at91_sys_write(AT91_SMC_CYCLE(chipselect), AT91_SMC_NWECYCLE_(cycle) |
|
||||
AT91_SMC_NRDCYCLE_(cycle));
|
||||
}
|
||||
|
||||
static unsigned int calc_mck_cycles(unsigned int ns, unsigned int mck_hz)
|
||||
{
|
||||
u64 tmp = ns;
|
||||
|
||||
tmp *= mck_hz;
|
||||
tmp += 1000*1000*1000 - 1; /* round up */
|
||||
do_div(tmp, 1000*1000*1000);
|
||||
return (unsigned int) tmp;
|
||||
}
|
||||
|
||||
static void apply_timings(const u8 chipselect, const u8 pio,
|
||||
const struct ide_timing *timing, int use_iordy)
|
||||
{
|
||||
unsigned int t0, t1, t2, t6z;
|
||||
unsigned int cycle, setup, pulse, data_float;
|
||||
unsigned int mck_hz;
|
||||
struct clk *mck;
|
||||
|
||||
/* see table 22 of Compact Flash standard 4.1 for the meaning,
|
||||
* we do not stretch active (t2) time, so setup (t1) + hold time (th)
|
||||
* assure at least minimal recovery (t2i) time */
|
||||
t0 = timing->cyc8b;
|
||||
t1 = timing->setup;
|
||||
t2 = timing->act8b;
|
||||
t6z = (pio < 5) ? 30 : 20;
|
||||
|
||||
pdbg("t0=%u t1=%u t2=%u t6z=%u\n", t0, t1, t2, t6z);
|
||||
|
||||
mck = clk_get(NULL, "mck");
|
||||
BUG_ON(IS_ERR(mck));
|
||||
mck_hz = clk_get_rate(mck);
|
||||
pdbg("mck_hz=%u\n", mck_hz);
|
||||
|
||||
cycle = calc_mck_cycles(t0, mck_hz);
|
||||
setup = calc_mck_cycles(t1, mck_hz);
|
||||
pulse = calc_mck_cycles(t2, mck_hz);
|
||||
data_float = calc_mck_cycles(t6z, mck_hz);
|
||||
|
||||
pdbg("cycle=%u setup=%u pulse=%u data_float=%u\n",
|
||||
cycle, setup, pulse, data_float);
|
||||
|
||||
set_smc_timings(chipselect, cycle, setup, pulse, data_float, use_iordy);
|
||||
}
|
||||
|
||||
static void at91_ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd,
|
||||
void *buf, unsigned int len)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct ide_io_ports *io_ports = &hwif->io_ports;
|
||||
u8 chipselect = hwif->select_data;
|
||||
unsigned long mode;
|
||||
|
||||
pdbg("cs %u buf %p len %d\n", chipselect, buf, len);
|
||||
|
||||
len++;
|
||||
|
||||
enter_16bit(chipselect, mode);
|
||||
readsw((void __iomem *)io_ports->data_addr, buf, len / 2);
|
||||
leave_16bit(chipselect, mode);
|
||||
}
|
||||
|
||||
static void at91_ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd,
|
||||
void *buf, unsigned int len)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct ide_io_ports *io_ports = &hwif->io_ports;
|
||||
u8 chipselect = hwif->select_data;
|
||||
unsigned long mode;
|
||||
|
||||
pdbg("cs %u buf %p len %d\n", chipselect, buf, len);
|
||||
|
||||
enter_16bit(chipselect, mode);
|
||||
writesw((void __iomem *)io_ports->data_addr, buf, len / 2);
|
||||
leave_16bit(chipselect, mode);
|
||||
}
|
||||
|
||||
static void at91_ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
|
||||
{
|
||||
struct ide_timing *timing;
|
||||
u8 chipselect = hwif->select_data;
|
||||
int use_iordy = 0;
|
||||
const u8 pio = drive->pio_mode - XFER_PIO_0;
|
||||
|
||||
pdbg("chipselect %u pio %u\n", chipselect, pio);
|
||||
|
||||
timing = ide_timing_find_mode(XFER_PIO_0 + pio);
|
||||
BUG_ON(!timing);
|
||||
|
||||
if (ide_pio_need_iordy(drive, pio))
|
||||
use_iordy = 1;
|
||||
|
||||
apply_timings(chipselect, pio, timing, use_iordy);
|
||||
}
|
||||
|
||||
static const struct ide_tp_ops at91_ide_tp_ops = {
|
||||
.exec_command = ide_exec_command,
|
||||
.read_status = ide_read_status,
|
||||
.read_altstatus = ide_read_altstatus,
|
||||
.write_devctl = ide_write_devctl,
|
||||
|
||||
.dev_select = ide_dev_select,
|
||||
.tf_load = ide_tf_load,
|
||||
.tf_read = ide_tf_read,
|
||||
|
||||
.input_data = at91_ide_input_data,
|
||||
.output_data = at91_ide_output_data,
|
||||
};
|
||||
|
||||
static const struct ide_port_ops at91_ide_port_ops = {
|
||||
.set_pio_mode = at91_ide_set_pio_mode,
|
||||
};
|
||||
|
||||
static const struct ide_port_info at91_ide_port_info __initdata = {
|
||||
.port_ops = &at91_ide_port_ops,
|
||||
.tp_ops = &at91_ide_tp_ops,
|
||||
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA | IDE_HFLAG_SINGLE |
|
||||
IDE_HFLAG_NO_IO_32BIT | IDE_HFLAG_UNMASK_IRQS,
|
||||
.pio_mask = ATA_PIO6,
|
||||
.chipset = ide_generic,
|
||||
};
|
||||
|
||||
/*
|
||||
* If interrupt is delivered through GPIO, IRQ are triggered on falling
|
||||
* and rising edge of signal. Whereas IDE device request interrupt on high
|
||||
* level (rising edge in our case). This mean we have fake interrupts, so
|
||||
* we need to check interrupt pin and exit instantly from ISR when line
|
||||
* is on low level.
|
||||
*/
|
||||
|
||||
irqreturn_t at91_irq_handler(int irq, void *dev_id)
|
||||
{
|
||||
int ntries = 8;
|
||||
int pin_val1, pin_val2;
|
||||
|
||||
/* additional deglitch, line can be noisy in badly designed PCB */
|
||||
do {
|
||||
pin_val1 = at91_get_gpio_value(irq);
|
||||
pin_val2 = at91_get_gpio_value(irq);
|
||||
} while (pin_val1 != pin_val2 && --ntries > 0);
|
||||
|
||||
if (pin_val1 == 0 || ntries <= 0)
|
||||
return IRQ_HANDLED;
|
||||
|
||||
return ide_intr(irq, dev_id);
|
||||
}
|
||||
|
||||
static int __init at91_ide_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret;
|
||||
struct ide_hw hw, *hws[] = { &hw };
|
||||
struct ide_host *host;
|
||||
struct resource *res;
|
||||
unsigned long tf_base = 0, ctl_base = 0;
|
||||
struct at91_cf_data *board = pdev->dev.platform_data;
|
||||
|
||||
if (!board)
|
||||
return -ENODEV;
|
||||
|
||||
if (board->det_pin && at91_get_gpio_value(board->det_pin) != 0) {
|
||||
perr("no device detected\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
perr("can't get memory resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!devm_request_mem_region(&pdev->dev, res->start + TASK_FILE,
|
||||
REGS_SIZE, "ide") ||
|
||||
!devm_request_mem_region(&pdev->dev, res->start + ALT_MODE,
|
||||
REGS_SIZE, "alt")) {
|
||||
perr("memory resources in use\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
pdbg("chipselect %u irq %u res %08lx\n", board->chipselect,
|
||||
board->irq_pin, (unsigned long) res->start);
|
||||
|
||||
tf_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + TASK_FILE,
|
||||
REGS_SIZE);
|
||||
ctl_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + ALT_MODE,
|
||||
REGS_SIZE);
|
||||
if (!tf_base || !ctl_base) {
|
||||
perr("can't map memory regions\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
memset(&hw, 0, sizeof(hw));
|
||||
|
||||
if (board->flags & AT91_IDE_SWAP_A0_A2) {
|
||||
/* workaround for stupid hardware bug */
|
||||
hw.io_ports.data_addr = tf_base + 0;
|
||||
hw.io_ports.error_addr = tf_base + 4;
|
||||
hw.io_ports.nsect_addr = tf_base + 2;
|
||||
hw.io_ports.lbal_addr = tf_base + 6;
|
||||
hw.io_ports.lbam_addr = tf_base + 1;
|
||||
hw.io_ports.lbah_addr = tf_base + 5;
|
||||
hw.io_ports.device_addr = tf_base + 3;
|
||||
hw.io_ports.command_addr = tf_base + 7;
|
||||
hw.io_ports.ctl_addr = ctl_base + 3;
|
||||
} else
|
||||
ide_std_init_ports(&hw, tf_base, ctl_base + 6);
|
||||
|
||||
hw.irq = board->irq_pin;
|
||||
hw.dev = &pdev->dev;
|
||||
|
||||
host = ide_host_alloc(&at91_ide_port_info, hws, 1);
|
||||
if (!host) {
|
||||
perr("failed to allocate ide host\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* setup Static Memory Controller - PIO 0 as default */
|
||||
apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0);
|
||||
|
||||
/* with GPIO interrupt we have to do quirks in handler */
|
||||
if (gpio_is_valid(board->irq_pin))
|
||||
host->irq_handler = at91_irq_handler;
|
||||
|
||||
host->ports[0]->select_data = board->chipselect;
|
||||
|
||||
ret = ide_host_register(host, &at91_ide_port_info, hws);
|
||||
if (ret) {
|
||||
perr("failed to register ide host\n");
|
||||
goto err_free_host;
|
||||
}
|
||||
platform_set_drvdata(pdev, host);
|
||||
return 0;
|
||||
|
||||
err_free_host:
|
||||
ide_host_free(host);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __exit at91_ide_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ide_host *host = platform_get_drvdata(pdev);
|
||||
|
||||
ide_host_remove(host);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver at91_ide_driver = {
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.remove = __exit_p(at91_ide_remove),
|
||||
};
|
||||
|
||||
static int __init at91_ide_init(void)
|
||||
{
|
||||
return platform_driver_probe(&at91_ide_driver, at91_ide_probe);
|
||||
}
|
||||
|
||||
static void __exit at91_ide_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&at91_ide_driver);
|
||||
}
|
||||
|
||||
module_init(at91_ide_init);
|
||||
module_exit(at91_ide_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Stanislaw Gruszka <stf_xl@wp.pl>");
|
||||
|
||||
@ -307,8 +307,12 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
|
||||
device_init_wakeup(&pdev->dev, 1);
|
||||
|
||||
platform_set_drvdata(pdev, rtc);
|
||||
rtc->rtt = (void __force __iomem *) (AT91_VA_BASE_SYS - AT91_BASE_SYS);
|
||||
rtc->rtt += r->start;
|
||||
rtc->rtt = ioremap(r->start, resource_size(r));
|
||||
if (!rtc->rtt) {
|
||||
dev_err(&pdev->dev, "failed to map registers, aborting.\n");
|
||||
ret = -ENOMEM;
|
||||
goto fail;
|
||||
}
|
||||
|
||||
mr = rtt_readl(rtc, MR);
|
||||
|
||||
@ -326,7 +330,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
|
||||
&at91_rtc_ops, THIS_MODULE);
|
||||
if (IS_ERR(rtc->rtcdev)) {
|
||||
ret = PTR_ERR(rtc->rtcdev);
|
||||
goto fail;
|
||||
goto fail_register;
|
||||
}
|
||||
|
||||
/* register irq handler after we know what name we'll use */
|
||||
@ -351,6 +355,8 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
|
||||
|
||||
return 0;
|
||||
|
||||
fail_register:
|
||||
iounmap(rtc->rtt);
|
||||
fail:
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
kfree(rtc);
|
||||
@ -371,6 +377,7 @@ static int __exit at91_rtc_remove(struct platform_device *pdev)
|
||||
|
||||
rtc_device_unregister(rtc->rtcdev);
|
||||
|
||||
iounmap(rtc->rtt);
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
kfree(rtc);
|
||||
return 0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user