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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 21:56:40 +07:00
drm/i915: Start returning an error from i915_vma_move_to_active()
Handling such a late error in request construction is tricky, but to accommodate future patches which may allocate here, we potentially could err. To handle the error after already adjusting global state to track the new request, we must finish and submit the request. But we don't want to use the request as not everything is being tracked by it, so we opt to cancel the commands inside the request. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180706103947.15919-3-chris@chris-wilson.co.uk
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6dd7526f6f
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a523697857
@ -476,7 +476,11 @@ static int prepare_shadow_batch_buffer(struct intel_vgpu_workload *workload)
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i915_gem_obj_finish_shmem_access(bb->obj);
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bb->accessing = false;
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i915_vma_move_to_active(bb->vma, workload->req, 0);
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ret = i915_vma_move_to_active(bb->vma,
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workload->req,
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0);
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if (ret)
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goto err;
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}
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}
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return 0;
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@ -3090,9 +3090,9 @@ i915_gem_obj_finish_shmem_access(struct drm_i915_gem_object *obj)
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}
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int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
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void i915_vma_move_to_active(struct i915_vma *vma,
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struct i915_request *rq,
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unsigned int flags);
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int __must_check i915_vma_move_to_active(struct i915_vma *vma,
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struct i915_request *rq,
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unsigned int flags);
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int i915_gem_dumb_create(struct drm_file *file_priv,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
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@ -1165,12 +1165,16 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
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goto err_request;
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GEM_BUG_ON(!reservation_object_test_signaled_rcu(batch->resv, true));
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i915_vma_move_to_active(batch, rq, 0);
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i915_vma_unpin(batch);
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err = i915_vma_move_to_active(batch, rq, 0);
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if (err)
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goto skip_request;
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i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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if (err)
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goto skip_request;
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rq->batch = batch;
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i915_vma_unpin(batch);
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cache->rq = rq;
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cache->rq_cmd = cmd;
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@ -1179,6 +1183,8 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
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/* Return with batch mapping (cmd) still pinned */
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return 0;
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skip_request:
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i915_request_skip(rq, err);
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err_request:
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i915_request_add(rq);
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err_unpin:
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@ -1818,7 +1824,11 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
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unsigned int flags = eb->flags[i];
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struct i915_vma *vma = eb->vma[i];
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i915_vma_move_to_active(vma, eb->request, flags);
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err = i915_vma_move_to_active(vma, eb->request, flags);
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if (unlikely(err)) {
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i915_request_skip(eb->request, err);
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return err;
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}
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__eb_unreserve_vma(vma, flags);
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vma->exec_flags = NULL;
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@ -1877,9 +1887,9 @@ static void export_fence(struct i915_vma *vma,
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reservation_object_unlock(resv);
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}
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void i915_vma_move_to_active(struct i915_vma *vma,
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struct i915_request *rq,
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unsigned int flags)
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int i915_vma_move_to_active(struct i915_vma *vma,
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struct i915_request *rq,
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unsigned int flags)
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{
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struct drm_i915_gem_object *obj = vma->obj;
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const unsigned int idx = rq->engine->id;
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@ -1916,6 +1926,7 @@ void i915_vma_move_to_active(struct i915_vma *vma,
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i915_gem_active_set(&vma->last_fence, rq);
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export_fence(vma, rq, flags);
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return 0;
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}
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static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
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@ -222,7 +222,7 @@ int i915_gem_render_state_emit(struct i915_request *rq)
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goto err_unpin;
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}
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i915_vma_move_to_active(so.vma, rq, 0);
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err = i915_vma_move_to_active(so.vma, rq, 0);
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err_unpin:
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i915_vma_unpin(so.vma);
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err_vma:
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@ -985,7 +985,10 @@ static int gpu_write(struct i915_vma *vma,
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goto err_request;
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}
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i915_vma_move_to_active(batch, rq, 0);
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err = i915_vma_move_to_active(batch, rq, 0);
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if (err)
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goto err_request;
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i915_gem_object_set_active_reference(batch->obj);
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i915_vma_unpin(batch);
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i915_vma_close(batch);
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@ -996,7 +999,9 @@ static int gpu_write(struct i915_vma *vma,
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if (err)
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goto err_request;
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i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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if (err)
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i915_request_skip(rq, err);
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err_request:
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i915_request_add(rq);
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@ -222,12 +222,12 @@ static int gpu_set(struct drm_i915_gem_object *obj,
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}
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intel_ring_advance(rq, cs);
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i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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i915_vma_unpin(vma);
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i915_request_add(rq);
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return 0;
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return err;
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}
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static bool always_valid(struct drm_i915_private *i915)
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@ -170,18 +170,26 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
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if (err)
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goto err_request;
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i915_vma_move_to_active(batch, rq, 0);
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err = i915_vma_move_to_active(batch, rq, 0);
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if (err)
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goto skip_request;
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err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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if (err)
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goto skip_request;
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i915_gem_object_set_active_reference(batch->obj);
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i915_vma_unpin(batch);
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i915_vma_close(batch);
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i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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i915_vma_unpin(vma);
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i915_request_add(rq);
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return 0;
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skip_request:
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i915_request_skip(rq, err);
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err_request:
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i915_request_add(rq);
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err_batch:
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@ -464,13 +464,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
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return PTR_ERR(rq);
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}
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i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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i915_request_add(rq);
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i915_gem_object_set_active_reference(obj);
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__i915_gem_object_release_unless_active(obj);
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i915_vma_unpin(vma);
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return 0;
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return err;
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}
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static bool assert_mmap_offset(struct drm_i915_private *i915,
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@ -675,7 +675,9 @@ static int live_all_engines(void *arg)
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i915_gem_object_set_active_reference(batch->obj);
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}
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i915_vma_move_to_active(batch, request[id], 0);
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err = i915_vma_move_to_active(batch, request[id], 0);
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GEM_BUG_ON(err);
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i915_request_get(request[id]);
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i915_request_add(request[id]);
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}
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@ -785,7 +787,9 @@ static int live_sequential_engines(void *arg)
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GEM_BUG_ON(err);
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request[id]->batch = batch;
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i915_vma_move_to_active(batch, request[id], 0);
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err = i915_vma_move_to_active(batch, request[id], 0);
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GEM_BUG_ON(err);
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i915_gem_object_set_active_reference(batch->obj);
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i915_vma_get(batch);
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@ -130,13 +130,19 @@ static int emit_recurse_batch(struct hang *h,
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if (err)
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goto unpin_vma;
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i915_vma_move_to_active(vma, rq, 0);
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err = i915_vma_move_to_active(vma, rq, 0);
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if (err)
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goto unpin_hws;
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if (!i915_gem_object_has_active_reference(vma->obj)) {
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i915_gem_object_get(vma->obj);
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i915_gem_object_set_active_reference(vma->obj);
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}
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i915_vma_move_to_active(hws, rq, 0);
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err = i915_vma_move_to_active(hws, rq, 0);
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if (err)
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goto unpin_hws;
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if (!i915_gem_object_has_active_reference(hws->obj)) {
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i915_gem_object_get(hws->obj);
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i915_gem_object_set_active_reference(hws->obj);
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@ -205,6 +211,7 @@ static int emit_recurse_batch(struct hang *h,
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err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, flags);
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unpin_hws:
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i915_vma_unpin(hws);
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unpin_vma:
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i915_vma_unpin(vma);
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@ -104,13 +104,19 @@ static int emit_recurse_batch(struct spinner *spin,
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if (err)
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goto unpin_vma;
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i915_vma_move_to_active(vma, rq, 0);
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err = i915_vma_move_to_active(vma, rq, 0);
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if (err)
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goto unpin_hws;
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if (!i915_gem_object_has_active_reference(vma->obj)) {
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i915_gem_object_get(vma->obj);
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i915_gem_object_set_active_reference(vma->obj);
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}
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i915_vma_move_to_active(hws, rq, 0);
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err = i915_vma_move_to_active(hws, rq, 0);
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if (err)
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goto unpin_hws;
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if (!i915_gem_object_has_active_reference(hws->obj)) {
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i915_gem_object_get(hws->obj);
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i915_gem_object_set_active_reference(hws->obj);
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@ -134,6 +140,7 @@ static int emit_recurse_batch(struct spinner *spin,
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err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, 0);
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unpin_hws:
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i915_vma_unpin(hws);
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unpin_vma:
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i915_vma_unpin(vma);
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@ -49,6 +49,10 @@ read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
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goto err_pin;
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}
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err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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if (err)
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goto err_req;
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srm = MI_STORE_REGISTER_MEM | MI_SRM_LRM_GLOBAL_GTT;
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if (INTEL_GEN(ctx->i915) >= 8)
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srm++;
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@ -67,8 +71,6 @@ read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
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}
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intel_ring_advance(rq, cs);
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i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
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i915_gem_object_get(result);
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i915_gem_object_set_active_reference(result);
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