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arm64: dts: renesas: r8a77995: Add IPMMU device nodes
Add r8a77995 IPMMU nodes and keep all disabled by default. Based on work for the r8a7795 and r8a7796 by Magnus Damm Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -115,6 +115,88 @@ pmu_a53 {
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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ipmmu_vi0: mmu@febd0000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xfebd0000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 14>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_vp0: mmu@fe990000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xfe990000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 16>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_vc0: mmu@fe6b0000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xfe6b0000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 12>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_pv0: mmu@fd800000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xfd800000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 6>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_hc: mmu@e6570000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xe6570000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 2>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_rt: mmu@ffc80000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xffc80000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 10>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_mp: mmu@ec670000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xec670000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 4>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_ds0: mmu@e6740000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xe6740000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 0>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_ds1: mmu@e7740000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xe7740000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 1>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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ipmmu_mm: mmu@e67b0000 {
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compatible = "renesas,ipmmu-r8a77995";
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reg = <0 0xe67b0000 0 0x1000>;
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interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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cpg: clock-controller@e6150000 {
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a77995-cpg-mssr";
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compatible = "renesas,r8a77995-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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reg = <0 0xe6150000 0 0x1000>;
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