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drm/i915/icl: Fix power well 2 wrt. DC-off toggling order

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To enable DC5/6 power well 2 has to be disabled as for previous
platforms, so fix things up.

Bspec: 4234
Fixes: 67ca07e7ac ("drm/i915/icl: Add power well support")
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102182200.17219-1-imre.deak@intel.com
This commit is contained in:
Imre Deak 2018-11-02 20:22:00 +02:00
parent 9a64c65083
commit a33e1ece77
1 changed files with 6 additions and 6 deletions
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12
drivers/gpu/drm/i915/intel_runtime_pm.c
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@ -2790,6 +2790,12 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.has_fuses = true,
},
},
{
.name = "DC off",
.domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = DISP_PW_ID_NONE,
},
{
.name = "power well 2",
.domains = ICL_PW_2_POWER_DOMAINS,
@ -2801,12 +2807,6 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.has_fuses = true,
},
},
{
.name = "DC off",
.domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = DISP_PW_ID_NONE,
},
{
.name = "power well 3",
.domains = ICL_PW_3_POWER_DOMAINS,