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hwmon: (k8temp) Fix wrong sensor selection for AMD K8 RevF/RevG CPUs
Meaning of ThermSenseCoreSel bit was inverted beginning with K8 RevF. That means with current driver temp1/temp2 belong to core 1 and temp3/temp4 belong to core 0 on a K8 RevF/RevG CPU. This patch ensures that temp1/temp2 always belong to core 0 and temp3/temp4 to core 1 for all K8 revisions. Cc: Rudolf Marek <r.marek@assembler.cz> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
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@ -48,6 +48,7 @@ struct k8temp_data {
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/* registers values */
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u8 sensorsp; /* sensor presence bits - SEL_CORE & SEL_PLACE */
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u32 temp[2][2]; /* core, place */
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u8 swap_core_select; /* meaning of SEL_CORE is inverted */
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};
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static struct k8temp_data *k8temp_update_device(struct device *dev)
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@ -117,6 +118,9 @@ static ssize_t show_temp(struct device *dev,
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int place = attr->index;
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struct k8temp_data *data = k8temp_update_device(dev);
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if (data->swap_core_select)
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core = core ? 0 : 1;
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return sprintf(buf, "%d\n",
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TEMP_FROM_REG(data->temp[core][place]));
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}
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@ -162,7 +166,12 @@ static int __devinit k8temp_probe(struct pci_dev *pdev,
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goto exit_free;
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}
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/*
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* AMD NPT family 0fh, i.e. RevF and RevG:
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* meaning of SEL_CORE bit is inverted
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*/
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if (model >= 0x40) {
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data->swap_core_select = 1;
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dev_warn(&pdev->dev, "Temperature readouts might be "
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"wrong - check erratum #141\n");
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}
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