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drm/amdgpu: fix bad address translation for sienna_cichlid
[ Upstream commit 6ec598cc9dfbf40433e94a2ed1a622e3ef80268b ] Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -21,6 +21,11 @@
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#ifndef __AMDGPU_UMC_H__
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#define __AMDGPU_UMC_H__
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/*
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* (addr / 256) * 4096, the higher 26 bits in ErrorAddr
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* is the index of 4KB block
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*/
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#define ADDR_OF_4KB_BLOCK(addr) (((addr) & ~0xffULL) << 4)
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/*
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* (addr / 256) * 8192, the higher 26 bits in ErrorAddr
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* is the index of 8KB block
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@ -233,7 +233,7 @@ static void umc_v8_7_query_error_address(struct amdgpu_device *adev,
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err_addr &= ~((0x1ULL << lsb) - 1);
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/* translate umc channel address to soc pa, 3 parts are included */
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retired_page = ADDR_OF_8KB_BLOCK(err_addr) |
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retired_page = ADDR_OF_4KB_BLOCK(err_addr) |
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ADDR_OF_256B_BLOCK(channel_index) |
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OFFSET_IN_256B_BLOCK(err_addr);
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