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drm/amdgpu: update RAS error handling
Parse return status from TA to determine error severity Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -502,6 +502,29 @@ struct ras_manager *amdgpu_ras_find_obj(struct amdgpu_device *adev,
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}
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/* obj end */
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void amdgpu_ras_parse_status_code(struct amdgpu_device* adev,
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const char* invoke_type,
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const char* block_name,
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enum ta_ras_status ret)
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{
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switch (ret) {
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case TA_RAS_STATUS__SUCCESS:
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return;
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case TA_RAS_STATUS__ERROR_RAS_NOT_AVAILABLE:
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dev_warn(adev->dev,
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"RAS WARN: %s %s currently unavailable\n",
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invoke_type,
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block_name);
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break;
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default:
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dev_err(adev->dev,
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"RAS ERROR: %s %s error failed ret 0x%X\n",
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invoke_type,
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block_name,
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ret);
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}
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}
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/* feature ctl begin */
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static int amdgpu_ras_is_feature_allowed(struct amdgpu_device *adev,
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struct ras_common_if *head)
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@ -592,11 +615,10 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
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if (!amdgpu_ras_intr_triggered()) {
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ret = psp_ras_enable_features(&adev->psp, &info, enable);
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if (ret) {
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dev_err(adev->dev, "RAS ERROR: %s %s feature "
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"failed ret %d\n",
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enable ? "enable":"disable",
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ras_block_str(head->block),
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ret);
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amdgpu_ras_parse_status_code(adev,
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enable ? "enable":"disable",
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ras_block_str(head->block),
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(enum ta_ras_status)ret);
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if (ret == TA_RAS_STATUS__RESET_NEEDED)
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return -EAGAIN;
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return -EINVAL;
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@ -821,10 +843,10 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev,
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ret = -EINVAL;
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}
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if (ret)
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dev_err(adev->dev, "RAS ERROR: inject %s error failed ret %d\n",
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ras_block_str(info->head.block),
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ret);
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amdgpu_ras_parse_status_code(adev,
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"inject",
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ras_block_str(info->head.block),
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(enum ta_ras_status)ret);
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return ret;
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}
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