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ARM: dts: imx53: pinctl update
This patch supplements pinctl support on i.MX53. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -320,6 +320,24 @@ pinctrl_esdhc3_1: esdhc3grp-1 {
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};
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};
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can1 {
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pinctrl_can1_1: can1grp-1 {
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fsl,pins = <
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847 0x80000000 /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */
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853 0x80000000 /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */
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>;
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};
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};
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can2 {
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pinctrl_can2_1: can2grp-1 {
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fsl,pins = <
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67 0x80000000 /* MX53_PAD_KEY_COL4__CAN2_TXCAN */
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74 0x80000000 /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */
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>;
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};
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};
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i2c1 {
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pinctrl_i2c1_1: i2c1grp-1 {
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fsl,pins = <
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@ -338,6 +356,15 @@ pinctrl_i2c2_1: i2c2grp-1 {
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};
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};
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i2c3 {
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pinctrl_i2c3_1: i2c3grp-1 {
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fsl,pins = <
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1102 0xc0000000 /* MX53_PAD_GPIO_6__I2C3_SDA */
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1130 0xc0000000 /* MX53_PAD_GPIO_5__I2C3_SCL */
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>;
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};
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};
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uart1 {
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pinctrl_uart1_1: uart1grp-1 {
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fsl,pins = <
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@ -373,6 +400,25 @@ pinctrl_uart3_1: uart3grp-1 {
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>;
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};
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};
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uart4 {
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pinctrl_uart4_1: uart4grp-1 {
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fsl,pins = <
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11 0x1c5 /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */
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18 0x1c5 /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */
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>;
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};
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};
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uart5 {
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pinctrl_uart5_1: uart5grp-1 {
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fsl,pins = <
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24 0x1c5 /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */
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31 0x1c5 /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */
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>;
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};
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};
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};
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uart1: serial@53fbc000 {
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