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ARM: tegra114: convert device tree files to use CLK defines
Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Hiroshi Doyu
Stephen Warren
parent
05849c9381
commit
a1c85860e2
@ -1,3 +1,4 @@
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#include <dt-bindings/clock/tegra114-car.h>
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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@ -35,7 +36,7 @@ timer@60005000 {
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<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 5>;
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clocks = <&tegra_car TEGRA114_CLK_TIMER>;
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};
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tegra_car: clock {
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@ -79,7 +80,7 @@ apbdma: dma {
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<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 34>;
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clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
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};
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ahb: ahb {
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@ -125,7 +126,7 @@ uarta: serial@70006000 {
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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nvidia,dma-request-selector = <&apbdma 8>;
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status = "disabled";
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clocks = <&tegra_car 6>;
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clocks = <&tegra_car TEGRA114_CLK_UARTA>;
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};
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uartb: serial@70006040 {
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@ -135,7 +136,7 @@ uartb: serial@70006040 {
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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nvidia,dma-request-selector = <&apbdma 9>;
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status = "disabled";
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clocks = <&tegra_car 192>;
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clocks = <&tegra_car TEGRA114_CLK_UARTB>;
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};
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uartc: serial@70006200 {
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@ -145,7 +146,7 @@ uartc: serial@70006200 {
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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nvidia,dma-request-selector = <&apbdma 10>;
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status = "disabled";
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clocks = <&tegra_car 55>;
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clocks = <&tegra_car TEGRA114_CLK_UARTC>;
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};
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uartd: serial@70006300 {
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@ -155,14 +156,14 @@ uartd: serial@70006300 {
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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nvidia,dma-request-selector = <&apbdma 19>;
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status = "disabled";
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clocks = <&tegra_car 65>;
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clocks = <&tegra_car TEGRA114_CLK_UARTD>;
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};
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pwm: pwm {
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compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
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reg = <0x7000a000 0x100>;
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#pwm-cells = <2>;
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clocks = <&tegra_car 17>;
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clocks = <&tegra_car TEGRA114_CLK_PWM>;
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status = "disabled";
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};
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@ -172,7 +173,7 @@ i2c@7000c000 {
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 12>;
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clocks = <&tegra_car TEGRA114_CLK_I2C1>;
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clock-names = "div-clk";
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status = "disabled";
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};
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@ -183,7 +184,7 @@ i2c@7000c400 {
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 54>;
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clocks = <&tegra_car TEGRA114_CLK_I2C2>;
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clock-names = "div-clk";
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status = "disabled";
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};
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@ -194,7 +195,7 @@ i2c@7000c500 {
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 67>;
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clocks = <&tegra_car TEGRA114_CLK_I2C3>;
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clock-names = "div-clk";
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status = "disabled";
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};
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@ -205,7 +206,7 @@ i2c@7000c700 {
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 103>;
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clocks = <&tegra_car TEGRA114_CLK_I2C4>;
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clock-names = "div-clk";
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status = "disabled";
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};
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@ -216,7 +217,7 @@ i2c@7000d000 {
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 47>;
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clocks = <&tegra_car TEGRA114_CLK_I2C5>;
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clock-names = "div-clk";
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status = "disabled";
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};
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@ -228,7 +229,7 @@ spi@7000d400 {
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nvidia,dma-request-selector = <&apbdma 15>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 41>;
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clocks = <&tegra_car TEGRA114_CLK_SBC1>;
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clock-names = "spi";
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status = "disabled";
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};
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@ -240,7 +241,7 @@ spi@7000d600 {
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nvidia,dma-request-selector = <&apbdma 16>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 44>;
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clocks = <&tegra_car TEGRA114_CLK_SBC2>;
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clock-names = "spi";
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status = "disabled";
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};
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@ -252,7 +253,7 @@ spi@7000d800 {
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nvidia,dma-request-selector = <&apbdma 17>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 46>;
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clocks = <&tegra_car TEGRA114_CLK_SBC3>;
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clock-names = "spi";
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status = "disabled";
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};
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@ -264,7 +265,7 @@ spi@7000da00 {
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nvidia,dma-request-selector = <&apbdma 18>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 68>;
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clocks = <&tegra_car TEGRA114_CLK_SBC4>;
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clock-names = "spi";
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status = "disabled";
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};
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@ -276,7 +277,7 @@ spi@7000dc00 {
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nvidia,dma-request-selector = <&apbdma 27>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 104>;
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clocks = <&tegra_car TEGRA114_CLK_SBC5>;
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clock-names = "spi";
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status = "disabled";
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};
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@ -288,7 +289,7 @@ spi@7000de00 {
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nvidia,dma-request-selector = <&apbdma 28>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 105>;
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clocks = <&tegra_car TEGRA114_CLK_SBC6>;
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clock-names = "spi";
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status = "disabled";
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};
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@ -297,21 +298,21 @@ rtc {
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compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
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reg = <0x7000e000 0x100>;
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 4>;
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clocks = <&tegra_car TEGRA114_CLK_RTC>;
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};
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kbc {
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compatible = "nvidia,tegra114-kbc";
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reg = <0x7000e200 0x100>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 36>;
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clocks = <&tegra_car TEGRA114_CLK_KBC>;
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status = "disabled";
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};
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pmc {
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compatible = "nvidia,tegra114-pmc";
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reg = <0x7000e400 0x400>;
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clocks = <&tegra_car 261>, <&clk32k_in>;
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clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
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clock-names = "pclk", "clk32k_in";
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};
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@ -330,7 +331,7 @@ sdhci@78000000 {
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compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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reg = <0x78000000 0x200>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 14>;
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clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
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status = "disable";
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};
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@ -338,7 +339,7 @@ sdhci@78000200 {
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compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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reg = <0x78000200 0x200>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 9>;
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clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
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status = "disable";
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};
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@ -346,7 +347,7 @@ sdhci@78000400 {
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compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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reg = <0x78000400 0x200>;
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 69>;
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clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
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status = "disable";
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};
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@ -354,7 +355,7 @@ sdhci@78000600 {
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compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
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reg = <0x78000600 0x200>;
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car 15>;
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clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
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status = "disable";
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};
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