mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-27 18:00:48 +07:00
[ARM] Merge next-s3c-s3c6410 into for-rmk-devel
Merge branch 'next-s3c-s3c6410' into for-rmk-devel
This commit is contained in:
commit
a19339f430
@ -20,6 +20,14 @@ config S3C6410_SETUP_SDHCI
|
||||
help
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||||
Internal helper functions for S3C6410 based SDHCI systems
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||||
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||||
config MACH_ANW6410
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bool "A&W6410"
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||||
select CPU_S3C6410
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select S3C_DEV_FB
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select S3C64XX_SETUP_FB_24BPP
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help
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||||
Machine support for the A&W6410
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config MACH_SMDK6410
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bool "SMDK6410"
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select CPU_S3C6410
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@ -62,3 +70,29 @@ config SMDK6410_SD_CH1
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channels 0 and 1 are the same.
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endchoice
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config SMDK6410_WM1190_EV1
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bool "Support Wolfson Microelectronics 1190-EV1 PMIC card"
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depends on MACH_SMDK6410
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select REGULATOR
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select REGULATOR_WM8350
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select MFD_WM8350_I2C
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select MFD_WM8350_CONFIG_MODE_0
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select MFD_WM8350_CONFIG_MODE_3
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select MFD_WM8352_CONFIG_MODE_0
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help
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||||
The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC
|
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and audio daughtercard for the Samsung SMDK6410 reference
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platform. Enabling this option will build support for this
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module into the kernel. The presence of the module will be
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detected at runtime so the the resulting kernel can be used
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with or without the 1190-EV1 fitted.
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config MACH_NCP
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bool "NCP"
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select CPU_S3C6410
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select S3C_DEV_I2C1
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select S3C_DEV_HSMMC1
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select S3C64XX_SETUP_I2C1
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help
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||||
Machine support for the Samsung NCP
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|
@ -20,4 +20,8 @@ obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci.o
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# machine support
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obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
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obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
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obj-$(CONFIG_MACH_NCP) += mach-ncp.o
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|
245
arch/arm/mach-s3c6410/mach-anw6410.c
Normal file
245
arch/arm/mach-s3c6410/mach-anw6410.c
Normal file
@ -0,0 +1,245 @@
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/* linux/arch/arm/mach-s3c6410/mach-anw6410.c
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*
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* Copyright 2008 Openmoko, Inc.
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||||
* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
|
||||
* Copyright 2009 Kwangwoo Lee
|
||||
* Kwangwoo Lee <kwangwoo.lee@gmail.com>
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||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
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||||
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||||
#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/fb.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/dm9000.h>
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#include <video/platform_lcd.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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||||
#include <mach/regs-fb.h>
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#include <mach/map.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <plat/regs-serial.h>
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#include <plat/iic.h>
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#include <plat/fb.h>
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#include <plat/s3c6410.h>
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#include <plat/clock.h>
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#include <plat/devs.h>
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#include <plat/cpu.h>
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#include <plat/regs-gpio.h>
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#include <plat/regs-modem.h>
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/* DM9000 */
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#define ANW6410_PA_DM9000 (0x18000000)
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/* A hardware buffer to control external devices is mapped at 0x30000000.
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* It can not be read. So current status must be kept in anw6410_extdev_status.
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*/
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#define ANW6410_VA_EXTDEV S3C_ADDR(0x02000000)
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#define ANW6410_PA_EXTDEV (0x30000000)
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#define ANW6410_EN_DM9000 (1<<11)
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#define ANW6410_EN_LCD (1<<14)
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static __u32 anw6410_extdev_status;
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static struct s3c2410_uartcfg anw6410_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = 0x3c5,
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.ulcon = 0x03,
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.ufcon = 0x51,
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},
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[1] = {
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.hwport = 1,
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||||
.flags = 0,
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||||
.ucon = 0x3c5,
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||||
.ulcon = 0x03,
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.ufcon = 0x51,
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},
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};
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/* framebuffer and LCD setup. */
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static void __init anw6410_lcd_mode_set(void)
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{
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u32 tmp;
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/* set the LCD type */
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tmp = __raw_readl(S3C64XX_SPCON);
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tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
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tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
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__raw_writel(tmp, S3C64XX_SPCON);
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/* remove the LCD bypass */
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tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
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tmp &= ~MIFPCON_LCD_BYPASS;
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__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
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}
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/* GPF1 = LCD panel power
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* GPF4 = LCD backlight control
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||||
*/
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static void anw6410_lcd_power_set(struct plat_lcd_data *pd,
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unsigned int power)
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{
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if (power) {
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anw6410_extdev_status |= (ANW6410_EN_LCD << 16);
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__raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
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gpio_direction_output(S3C64XX_GPF(1), 1);
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gpio_direction_output(S3C64XX_GPF(4), 1);
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} else {
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anw6410_extdev_status &= ~(ANW6410_EN_LCD << 16);
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__raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
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gpio_direction_output(S3C64XX_GPF(1), 0);
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gpio_direction_output(S3C64XX_GPF(4), 0);
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}
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}
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static struct plat_lcd_data anw6410_lcd_power_data = {
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.set_power = anw6410_lcd_power_set,
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};
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static struct platform_device anw6410_lcd_powerdev = {
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.name = "platform-lcd",
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.dev.parent = &s3c_device_fb.dev,
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.dev.platform_data = &anw6410_lcd_power_data,
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};
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static struct s3c_fb_pd_win anw6410_fb_win0 = {
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/* this is to ensure we use win0 */
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.win_mode = {
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.pixclock = 41094,
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.left_margin = 8,
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.right_margin = 13,
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.upper_margin = 7,
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.lower_margin = 5,
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.hsync_len = 3,
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.vsync_len = 1,
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.xres = 800,
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.yres = 480,
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},
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.max_bpp = 32,
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.default_bpp = 16,
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};
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/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
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static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = {
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.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
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.win[0] = &anw6410_fb_win0,
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.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
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.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
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};
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/* DM9000AEP 10/100 ethernet controller */
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static void __init anw6410_dm9000_enable(void)
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{
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anw6410_extdev_status |= (ANW6410_EN_DM9000 << 16);
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__raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
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}
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static struct resource anw6410_dm9000_resource[] = {
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[0] = {
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.start = ANW6410_PA_DM9000,
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.end = ANW6410_PA_DM9000 + 3,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = ANW6410_PA_DM9000 + 4,
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.end = ANW6410_PA_DM9000 + 4 + 500,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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.start = IRQ_EINT(15),
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.end = IRQ_EINT(15),
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
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},
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};
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static struct dm9000_plat_data anw6410_dm9000_pdata = {
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.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
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/* dev_addr can be set to provide hwaddr. */
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};
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static struct platform_device anw6410_device_eth = {
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.name = "dm9000",
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.id = -1,
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.num_resources = ARRAY_SIZE(anw6410_dm9000_resource),
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.resource = anw6410_dm9000_resource,
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.dev = {
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.platform_data = &anw6410_dm9000_pdata,
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},
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};
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static struct map_desc anw6410_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)ANW6410_VA_EXTDEV,
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.pfn = __phys_to_pfn(ANW6410_PA_EXTDEV),
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.length = SZ_64K,
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.type = MT_DEVICE,
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},
|
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};
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static struct platform_device *anw6410_devices[] __initdata = {
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&s3c_device_fb,
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&anw6410_lcd_powerdev,
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&anw6410_device_eth,
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};
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static void __init anw6410_map_io(void)
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{
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s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc));
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||||
s3c24xx_init_clocks(12000000);
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s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs));
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||||
|
||||
anw6410_lcd_mode_set();
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||||
}
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||||
|
||||
static void __init anw6410_machine_init(void)
|
||||
{
|
||||
s3c_fb_set_platdata(&anw6410_lcd_pdata);
|
||||
|
||||
gpio_request(S3C64XX_GPF(1), "panel power");
|
||||
gpio_request(S3C64XX_GPF(4), "LCD backlight");
|
||||
|
||||
anw6410_dm9000_enable();
|
||||
|
||||
platform_add_devices(anw6410_devices, ARRAY_SIZE(anw6410_devices));
|
||||
}
|
||||
|
||||
MACHINE_START(ANW6410, "A&W6410")
|
||||
/* Maintainer: Kwangwoo Lee <kwangwoo.lee@gmail.com> */
|
||||
.phys_io = S3C_PA_UART & 0xfff00000,
|
||||
.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
|
||||
.boot_params = S3C64XX_PA_SDRAM + 0x100,
|
||||
|
||||
.init_irq = s3c6410_init_irq,
|
||||
.map_io = anw6410_map_io,
|
||||
.init_machine = anw6410_machine_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
MACHINE_END
|
107
arch/arm/mach-s3c6410/mach-ncp.c
Normal file
107
arch/arm/mach-s3c6410/mach-ncp.c
Normal file
@ -0,0 +1,107 @@
|
||||
/*
|
||||
* linux/arch/arm/mach-s3c6410/mach-ncp.c
|
||||
*
|
||||
* Copyright (C) 2008-2009 Samsung Electronics
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <video/platform_lcd.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/regs-fb.h>
|
||||
#include <mach/map.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <plat/regs-serial.h>
|
||||
#include <plat/iic.h>
|
||||
#include <plat/fb.h>
|
||||
|
||||
#include <plat/s3c6410.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/cpu.h>
|
||||
|
||||
#define UCON S3C2410_UCON_DEFAULT
|
||||
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
|
||||
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
|
||||
|
||||
static struct s3c2410_uartcfg ncp_uartcfgs[] __initdata = {
|
||||
/* REVISIT: NCP uses only serial 1, 2 */
|
||||
[0] = {
|
||||
.hwport = 0,
|
||||
.flags = 0,
|
||||
.ucon = UCON,
|
||||
.ulcon = ULCON,
|
||||
.ufcon = UFCON,
|
||||
},
|
||||
[1] = {
|
||||
.hwport = 1,
|
||||
.flags = 0,
|
||||
.ucon = UCON,
|
||||
.ulcon = ULCON,
|
||||
.ufcon = UFCON,
|
||||
},
|
||||
[2] = {
|
||||
.hwport = 2,
|
||||
.flags = 0,
|
||||
.ucon = UCON,
|
||||
.ulcon = ULCON,
|
||||
.ufcon = UFCON,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device *ncp_devices[] __initdata = {
|
||||
&s3c_device_hsmmc1,
|
||||
&s3c_device_i2c0,
|
||||
};
|
||||
|
||||
struct map_desc ncp_iodesc[] = {};
|
||||
|
||||
static void __init ncp_map_io(void)
|
||||
{
|
||||
s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc));
|
||||
s3c24xx_init_clocks(12000000);
|
||||
s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs));
|
||||
}
|
||||
|
||||
static void __init ncp_machine_init(void)
|
||||
{
|
||||
s3c_i2c0_set_platdata(NULL);
|
||||
|
||||
platform_add_devices(ncp_devices, ARRAY_SIZE(ncp_devices));
|
||||
}
|
||||
|
||||
MACHINE_START(NCP, "NCP")
|
||||
/* Maintainer: Samsung Electronics */
|
||||
.phys_io = S3C_PA_UART & 0xfff00000,
|
||||
.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
|
||||
.boot_params = S3C64XX_PA_SDRAM + 0x100,
|
||||
.init_irq = s3c6410_init_irq,
|
||||
.map_io = ncp_map_io,
|
||||
.init_machine = ncp_machine_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
MACHINE_END
|
@ -24,6 +24,12 @@
|
||||
#include <linux/fb.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/smsc911x.h>
|
||||
|
||||
#ifdef CONFIG_SMDK6410_WM1190_EV1
|
||||
#include <linux/mfd/wm8350/core.h>
|
||||
#include <linux/mfd/wm8350/pmic.h>
|
||||
#endif
|
||||
|
||||
#include <video/platform_lcd.h>
|
||||
|
||||
@ -39,8 +45,12 @@
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <plat/regs-serial.h>
|
||||
#include <plat/regs-modem.h>
|
||||
#include <plat/regs-gpio.h>
|
||||
#include <plat/regs-sys.h>
|
||||
#include <plat/iic.h>
|
||||
#include <plat/fb.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
|
||||
#include <plat/s3c6410.h>
|
||||
#include <plat/clock.h>
|
||||
@ -129,6 +139,37 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
|
||||
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
|
||||
};
|
||||
|
||||
static struct resource smdk6410_smsc911x_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x18000000,
|
||||
.end = 0x18000000 + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = S3C_EINT(10),
|
||||
.end = S3C_EINT(10),
|
||||
.flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
|
||||
},
|
||||
};
|
||||
|
||||
static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
|
||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
|
||||
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
|
||||
.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
};
|
||||
|
||||
|
||||
static struct platform_device smdk6410_smsc911x = {
|
||||
.name = "smsc911x",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
|
||||
.resource = &smdk6410_smsc911x_resources[0],
|
||||
.dev = {
|
||||
.platform_data = &smdk6410_smsc911x_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static struct map_desc smdk6410_iodesc[] = {};
|
||||
|
||||
static struct platform_device *smdk6410_devices[] __initdata = {
|
||||
@ -143,11 +184,152 @@ static struct platform_device *smdk6410_devices[] __initdata = {
|
||||
&s3c_device_fb,
|
||||
&s3c_device_usb,
|
||||
&smdk6410_lcd_powerdev,
|
||||
|
||||
&smdk6410_smsc911x,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_SMDK6410_WM1190_EV1
|
||||
/* S3C64xx internal logic & PLL */
|
||||
static struct regulator_init_data wm8350_dcdc1_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_INT/PVDD_PLL",
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 1200000,
|
||||
.always_on = 1,
|
||||
.apply_uV = 1,
|
||||
},
|
||||
};
|
||||
|
||||
/* Memory */
|
||||
static struct regulator_init_data wm8350_dcdc3_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_MEM",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.always_on = 1,
|
||||
.state_mem = {
|
||||
.uV = 1800000,
|
||||
.mode = REGULATOR_MODE_NORMAL,
|
||||
.enabled = 1,
|
||||
},
|
||||
.initial_state = PM_SUSPEND_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
/* USB, EXT, PCM, ADC/DAC, USB, MMC */
|
||||
static struct regulator_init_data wm8350_dcdc4_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
|
||||
.min_uV = 3000000,
|
||||
.max_uV = 3000000,
|
||||
.always_on = 1,
|
||||
},
|
||||
};
|
||||
|
||||
/* ARM core */
|
||||
static struct regulator_consumer_supply dcdc6_consumers[] = {
|
||||
{
|
||||
.supply = "vddarm",
|
||||
}
|
||||
};
|
||||
|
||||
static struct regulator_init_data wm8350_dcdc6_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_ARM",
|
||||
.min_uV = 1000000,
|
||||
.max_uV = 1300000,
|
||||
.always_on = 1,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers),
|
||||
.consumer_supplies = dcdc6_consumers,
|
||||
};
|
||||
|
||||
/* Alive */
|
||||
static struct regulator_init_data wm8350_ldo1_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_ALIVE",
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 1200000,
|
||||
.always_on = 1,
|
||||
.apply_uV = 1,
|
||||
},
|
||||
};
|
||||
|
||||
/* OTG */
|
||||
static struct regulator_init_data wm8350_ldo2_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_OTG",
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.always_on = 1,
|
||||
},
|
||||
};
|
||||
|
||||
/* LCD */
|
||||
static struct regulator_init_data wm8350_ldo3_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_LCD",
|
||||
.min_uV = 3000000,
|
||||
.max_uV = 3000000,
|
||||
.always_on = 1,
|
||||
},
|
||||
};
|
||||
|
||||
/* OTGi/1190-EV1 HPVDD & AVDD */
|
||||
static struct regulator_init_data wm8350_ldo4_data = {
|
||||
.constraints = {
|
||||
.name = "PVDD_OTGI/HPVDD/AVDD",
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 1200000,
|
||||
.apply_uV = 1,
|
||||
.always_on = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct {
|
||||
int regulator;
|
||||
struct regulator_init_data *initdata;
|
||||
} wm1190_regulators[] = {
|
||||
{ WM8350_DCDC_1, &wm8350_dcdc1_data },
|
||||
{ WM8350_DCDC_3, &wm8350_dcdc3_data },
|
||||
{ WM8350_DCDC_4, &wm8350_dcdc4_data },
|
||||
{ WM8350_DCDC_6, &wm8350_dcdc6_data },
|
||||
{ WM8350_LDO_1, &wm8350_ldo1_data },
|
||||
{ WM8350_LDO_2, &wm8350_ldo2_data },
|
||||
{ WM8350_LDO_3, &wm8350_ldo3_data },
|
||||
{ WM8350_LDO_4, &wm8350_ldo4_data },
|
||||
};
|
||||
|
||||
static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Instantiate the regulators */
|
||||
for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
|
||||
wm8350_register_regulator(wm8350,
|
||||
wm1190_regulators[i].regulator,
|
||||
wm1190_regulators[i].initdata);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
|
||||
.init = smdk6410_wm8350_init,
|
||||
.irq_high = 1,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct i2c_board_info i2c_devs0[] __initdata = {
|
||||
{ I2C_BOARD_INFO("24c08", 0x50), },
|
||||
{ I2C_BOARD_INFO("wm8580", 0x1b), },
|
||||
|
||||
#ifdef CONFIG_SMDK6410_WM1190_EV1
|
||||
{ I2C_BOARD_INFO("wm8350", 0x1a),
|
||||
.platform_data = &smdk6410_wm8350_pdata,
|
||||
.irq = S3C_EINT(12),
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct i2c_board_info i2c_devs1[] __initdata = {
|
||||
@ -156,9 +338,23 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
|
||||
|
||||
static void __init smdk6410_map_io(void)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
|
||||
s3c24xx_init_clocks(12000000);
|
||||
s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
|
||||
|
||||
/* set the LCD type */
|
||||
|
||||
tmp = __raw_readl(S3C64XX_SPCON);
|
||||
tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
|
||||
tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
|
||||
__raw_writel(tmp, S3C64XX_SPCON);
|
||||
|
||||
/* remove the lcd bypass */
|
||||
tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
|
||||
tmp &= ~MIFPCON_LCD_BYPASS;
|
||||
__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
|
||||
}
|
||||
|
||||
static void __init smdk6410_machine_init(void)
|
||||
|
Loading…
Reference in New Issue
Block a user