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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Blackfin arch: fix bug - Cpufreq assumes clocks in kHz and not Hz.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -72,13 +72,13 @@ unsigned int __bfin_cycles_mod;
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/**************************************************************************/
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static unsigned int bfin_getfreq(unsigned int cpu)
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static unsigned int bfin_getfreq_khz(unsigned int cpu)
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{
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/* The driver only support single cpu */
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if (cpu != 0)
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return -1;
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return get_cclk();
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return get_cclk() / 1000;
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}
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@ -96,7 +96,7 @@ static int bfin_target(struct cpufreq_policy *policy,
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cclk_hz = bfin_freq_table[index].frequency;
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freqs.old = bfin_getfreq(0);
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freqs.old = bfin_getfreq_khz(0);
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freqs.new = cclk_hz;
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freqs.cpu = 0;
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@ -137,8 +137,8 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
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if (policy->cpu != 0)
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return -EINVAL;
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cclk = get_cclk();
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sclk = get_sclk();
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cclk = get_cclk() / 1000;
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sclk = get_sclk() / 1000;
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#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
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min_cclk = sclk * 2;
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@ -152,7 +152,7 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
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dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
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dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1;
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pr_debug("cpufreq: freq:%d csel:%d tscale:%d\n",
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pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
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bfin_freq_table[index].frequency,
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dpm_state_table[index].csel,
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dpm_state_table[index].tscale);
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@ -173,7 +173,7 @@ static struct freq_attr *bfin_freq_attr[] = {
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static struct cpufreq_driver bfin_driver = {
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.verify = bfin_verify_speed,
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.target = bfin_target,
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.get = bfin_getfreq,
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.get = bfin_getfreq_khz,
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.init = __bfin_cpu_init,
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.name = "bfin cpufreq",
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.owner = THIS_MODULE,
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