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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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via: Try to improve command-buffer chaining.
Bump driver date and patchlevel. Signed-off-by: Dave Airlie <airlied@linux.ie>
This commit is contained in:
Thomas Hellstrom
Dave Airlie
parent
bc07dc7f07
commit
a0a6dd0b22
@ -252,7 +252,7 @@ static int via_dma_init(DRM_IOCTL_ARGS)
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break;
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case VIA_DMA_INITIALIZED:
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retcode = (dev_priv->ring.virtual_start != NULL) ?
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0 : DRM_ERR(EFAULT);
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0 : DRM_ERR(EFAULT);
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break;
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default:
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retcode = DRM_ERR(EINVAL);
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@ -432,56 +432,32 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
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{
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int paused, count;
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volatile uint32_t *paused_at = dev_priv->last_pause_ptr;
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via_flush_write_combine();
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while (!*(via_get_dma(dev_priv) - 1)) ;
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*dev_priv->last_pause_ptr = pause_addr_lo;
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via_flush_write_combine();
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/*
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* The below statement is inserted to really force the flush.
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* Not sure it is needed.
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*/
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while (!*dev_priv->last_pause_ptr) ;
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dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
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while (!*dev_priv->last_pause_ptr) ;
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uint32_t reader,ptr;
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paused = 0;
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count = 20;
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via_flush_write_combine();
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*dev_priv->last_pause_ptr = pause_addr_lo;
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via_flush_write_combine();
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reader = *(dev_priv->hw_addr_ptr);
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ptr = ((volatile char *)paused_at - dev_priv->dma_ptr) +
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dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4;
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dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
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while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--) ;
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if ((count <= 8) && (count >= 0)) {
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uint32_t rgtr, ptr;
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rgtr = *(dev_priv->hw_addr_ptr);
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ptr = ((volatile char *)dev_priv->last_pause_ptr -
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dev_priv->dma_ptr) + dev_priv->dma_offset +
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(uint32_t) dev_priv->agpAddr + 4 - CMDBUF_ALIGNMENT_SIZE;
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if (rgtr <= ptr) {
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DRM_ERROR
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("Command regulator\npaused at count %d, address %x, "
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"while current pause address is %x.\n"
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"Please mail this message to "
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"<unichrome-devel@lists.sourceforge.net>\n", count,
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rgtr, ptr);
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}
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if ((ptr - reader) <= dev_priv->dma_diff ) {
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count = 10000000;
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while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--);
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}
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if (paused && !no_pci_fire) {
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uint32_t rgtr, ptr;
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uint32_t ptr_low;
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reader = *(dev_priv->hw_addr_ptr);
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if ((ptr - reader) == dev_priv->dma_diff) {
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count = 1000000;
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while ((VIA_READ(VIA_REG_STATUS) & VIA_CMD_RGTR_BUSY)
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&& count--) ;
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/*
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* There is a concern that these writes may stall the PCI bus
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* if the GPU is not idle. However, idling the GPU first
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* doesn't make a difference.
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*/
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rgtr = *(dev_priv->hw_addr_ptr);
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ptr = ((volatile char *)paused_at - dev_priv->dma_ptr) +
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dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4;
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ptr_low = (ptr > 3 * CMDBUF_ALIGNMENT_SIZE) ?
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ptr - 3 * CMDBUF_ALIGNMENT_SIZE : 0;
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if (rgtr <= ptr && rgtr >= ptr_low) {
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VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
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VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
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VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
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@ -494,6 +470,9 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
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static int via_wait_idle(drm_via_private_t * dev_priv)
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{
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int count = 10000000;
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while (!(VIA_READ(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && count--);
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while (count-- && (VIA_READ(VIA_REG_STATUS) &
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(VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY |
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VIA_3D_ENG_BUSY))) ;
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@ -537,6 +516,9 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
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uint32_t end_addr, end_addr_lo;
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uint32_t command;
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uint32_t agp_base;
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uint32_t ptr;
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uint32_t reader;
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int count;
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dev_priv->dma_low = 0;
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@ -554,7 +536,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
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&pause_addr_hi, &pause_addr_lo, 1) - 1;
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via_flush_write_combine();
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while (!*dev_priv->last_pause_ptr) ;
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while(! *dev_priv->last_pause_ptr);
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VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
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VIA_WRITE(VIA_REG_TRANSPACE, command);
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@ -566,6 +548,24 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
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DRM_WRITEMEMORYBARRIER();
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VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK);
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VIA_READ(VIA_REG_TRANSPACE);
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dev_priv->dma_diff = 0;
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count = 10000000;
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while (!(VIA_READ(0x41c) & 0x80000000) && count--);
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reader = *(dev_priv->hw_addr_ptr);
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ptr = ((volatile char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) +
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dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4;
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/*
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* This is the difference between where we tell the
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* command reader to pause and where it actually pauses.
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* This differs between hw implementation so we need to
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* detect it.
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*/
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dev_priv->dma_diff = ptr - reader;
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}
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static void via_pad_cache(drm_via_private_t * dev_priv, int qwords)
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@ -592,7 +592,6 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
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uint32_t pause_addr_lo, pause_addr_hi;
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uint32_t jump_addr_lo, jump_addr_hi;
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volatile uint32_t *last_pause_ptr;
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uint32_t dma_low_save1, dma_low_save2;
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agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
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via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi,
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@ -619,31 +618,11 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
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&pause_addr_lo, 0);
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*last_pause_ptr = pause_addr_lo;
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dma_low_save1 = dev_priv->dma_low;
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/*
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* Now, set a trap that will pause the regulator if it tries to rerun the old
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* command buffer. (Which may happen if via_hook_segment detecs a command regulator pause
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* and reissues the jump command over PCI, while the regulator has already taken the jump
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* and actually paused at the current buffer end).
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* There appears to be no other way to detect this condition, since the hw_addr_pointer
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* does not seem to get updated immediately when a jump occurs.
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*/
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last_pause_ptr =
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via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
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&pause_addr_lo, 0) - 1;
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via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
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&pause_addr_lo, 0);
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*last_pause_ptr = pause_addr_lo;
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dma_low_save2 = dev_priv->dma_low;
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dev_priv->dma_low = dma_low_save1;
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via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0);
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dev_priv->dma_low = dma_low_save2;
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via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0);
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via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0);
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}
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static void via_cmdbuf_rewind(drm_via_private_t * dev_priv)
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{
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via_cmdbuf_jump(dev_priv);
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@ -29,11 +29,11 @@
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#define DRIVER_NAME "via"
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#define DRIVER_DESC "VIA Unichrome / Pro"
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#define DRIVER_DATE "20061227"
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#define DRIVER_DATE "20070202"
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#define DRIVER_MAJOR 2
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#define DRIVER_MINOR 11
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#define DRIVER_PATCHLEVEL 0
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#define DRIVER_PATCHLEVEL 1
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#include "via_verifier.h"
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@ -93,6 +93,7 @@ typedef struct drm_via_private {
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unsigned long vram_offset;
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unsigned long agp_offset;
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drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
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uint32_t dma_diff;
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} drm_via_private_t;
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enum via_family {
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