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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
hinic: add support to set and get irq coalesce
add support to set TX/RX irq coalesce params with ethtool -C and get these params with ethtool -c. Signed-off-by: Luo bin <luobin9@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Luo bin
David S. Miller
parent
ea256222a4
commit
a0337c0dee
@ -49,6 +49,12 @@ enum hinic_rss_hash_type {
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HINIC_RSS_HASH_ENGINE_TYPE_MAX,
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};
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struct hinic_intr_coal_info {
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u8 pending_limt;
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u8 coalesce_timer_cfg;
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u8 resend_timer_cfg;
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};
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struct hinic_dev {
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struct net_device *netdev;
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struct hinic_hwdev *hwdev;
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@ -82,6 +88,8 @@ struct hinic_dev {
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struct hinic_rss_type rss_type;
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u8 *rss_hkey_user;
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s32 *rss_indir_user;
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struct hinic_intr_coal_info *rx_intr_coalesce;
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struct hinic_intr_coal_info *tx_intr_coalesce;
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struct hinic_sriov_info sriov_info;
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};
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@ -49,6 +49,13 @@
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#define ETHTOOL_ADD_ADVERTISED_LINK_MODE(ecmd, mode) \
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((ecmd)->advertising |= ADVERTISED_##mode)
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#define COALESCE_PENDING_LIMIT_UNIT 8
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#define COALESCE_TIMER_CFG_UNIT 9
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#define COALESCE_ALL_QUEUE 0xFFFF
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#define COALESCE_MAX_PENDING_LIMIT (255 * COALESCE_PENDING_LIMIT_UNIT)
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#define COALESCE_MAX_TIMER_CFG (255 * COALESCE_TIMER_CFG_UNIT)
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#define OBJ_STR_MAX_LEN 32
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struct hw2ethtool_link_mode {
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enum ethtool_link_mode_bit_indices link_mode_bit;
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u32 speed;
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@ -614,6 +621,215 @@ static int hinic_set_ringparam(struct net_device *netdev,
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return 0;
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}
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static int __hinic_get_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *coal, u16 queue)
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{
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struct hinic_dev *nic_dev = netdev_priv(netdev);
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struct hinic_intr_coal_info *rx_intr_coal_info;
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struct hinic_intr_coal_info *tx_intr_coal_info;
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if (queue == COALESCE_ALL_QUEUE) {
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/* get tx/rx irq0 as default parameters */
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rx_intr_coal_info = &nic_dev->rx_intr_coalesce[0];
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tx_intr_coal_info = &nic_dev->tx_intr_coalesce[0];
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} else {
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if (queue >= nic_dev->num_qps) {
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netif_err(nic_dev, drv, netdev,
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"Invalid queue_id: %d\n", queue);
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return -EINVAL;
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}
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rx_intr_coal_info = &nic_dev->rx_intr_coalesce[queue];
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tx_intr_coal_info = &nic_dev->tx_intr_coalesce[queue];
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}
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/* coalesce_timer is in unit of 9us */
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coal->rx_coalesce_usecs = rx_intr_coal_info->coalesce_timer_cfg *
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COALESCE_TIMER_CFG_UNIT;
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/* coalesced_frames is in unit of 8 */
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coal->rx_max_coalesced_frames = rx_intr_coal_info->pending_limt *
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COALESCE_PENDING_LIMIT_UNIT;
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coal->tx_coalesce_usecs = tx_intr_coal_info->coalesce_timer_cfg *
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COALESCE_TIMER_CFG_UNIT;
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coal->tx_max_coalesced_frames = tx_intr_coal_info->pending_limt *
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COALESCE_PENDING_LIMIT_UNIT;
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return 0;
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}
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static int is_coalesce_exceed_limit(const struct ethtool_coalesce *coal)
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{
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if (coal->rx_coalesce_usecs > COALESCE_MAX_TIMER_CFG ||
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coal->rx_max_coalesced_frames > COALESCE_MAX_PENDING_LIMIT ||
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coal->tx_coalesce_usecs > COALESCE_MAX_TIMER_CFG ||
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coal->tx_max_coalesced_frames > COALESCE_MAX_PENDING_LIMIT)
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return -ERANGE;
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return 0;
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}
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static int set_queue_coalesce(struct hinic_dev *nic_dev, u16 q_id,
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struct hinic_intr_coal_info *coal,
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bool set_rx_coal)
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{
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struct hinic_intr_coal_info *intr_coal = NULL;
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struct hinic_msix_config interrupt_info = {0};
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struct net_device *netdev = nic_dev->netdev;
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u16 msix_idx;
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int err;
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intr_coal = set_rx_coal ? &nic_dev->rx_intr_coalesce[q_id] :
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&nic_dev->tx_intr_coalesce[q_id];
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intr_coal->coalesce_timer_cfg = coal->coalesce_timer_cfg;
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intr_coal->pending_limt = coal->pending_limt;
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/* netdev not running or qp not in using,
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* don't need to set coalesce to hw
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*/
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if (!(nic_dev->flags & HINIC_INTF_UP) ||
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q_id >= nic_dev->num_qps)
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return 0;
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msix_idx = set_rx_coal ? nic_dev->rxqs[q_id].rq->msix_entry :
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nic_dev->txqs[q_id].sq->msix_entry;
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interrupt_info.msix_index = msix_idx;
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interrupt_info.coalesce_timer_cnt = intr_coal->coalesce_timer_cfg;
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interrupt_info.pending_cnt = intr_coal->pending_limt;
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interrupt_info.resend_timer_cnt = intr_coal->resend_timer_cfg;
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err = hinic_set_interrupt_cfg(nic_dev->hwdev, &interrupt_info);
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if (err)
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netif_warn(nic_dev, drv, netdev,
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"Failed to set %s queue%d coalesce",
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set_rx_coal ? "rx" : "tx", q_id);
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return err;
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}
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static int __set_hw_coal_param(struct hinic_dev *nic_dev,
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struct hinic_intr_coal_info *intr_coal,
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u16 queue, bool set_rx_coal)
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{
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int err;
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u16 i;
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if (queue == COALESCE_ALL_QUEUE) {
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for (i = 0; i < nic_dev->max_qps; i++) {
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err = set_queue_coalesce(nic_dev, i, intr_coal,
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set_rx_coal);
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if (err)
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return err;
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}
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} else {
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if (queue >= nic_dev->num_qps) {
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netif_err(nic_dev, drv, nic_dev->netdev,
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"Invalid queue_id: %d\n", queue);
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return -EINVAL;
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}
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err = set_queue_coalesce(nic_dev, queue, intr_coal,
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set_rx_coal);
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if (err)
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return err;
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}
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return 0;
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}
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static int __hinic_set_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *coal, u16 queue)
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{
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struct hinic_intr_coal_info *ori_rx_intr_coal = NULL;
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struct hinic_intr_coal_info *ori_tx_intr_coal = NULL;
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struct hinic_dev *nic_dev = netdev_priv(netdev);
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struct hinic_intr_coal_info rx_intr_coal = {0};
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struct hinic_intr_coal_info tx_intr_coal = {0};
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char obj_str[OBJ_STR_MAX_LEN] = {0};
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bool set_rx_coal = false;
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bool set_tx_coal = false;
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int err;
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err = is_coalesce_exceed_limit(coal);
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if (err)
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return err;
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if (coal->rx_coalesce_usecs || coal->rx_max_coalesced_frames) {
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rx_intr_coal.coalesce_timer_cfg =
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(u8)(coal->rx_coalesce_usecs / COALESCE_TIMER_CFG_UNIT);
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rx_intr_coal.pending_limt = (u8)(coal->rx_max_coalesced_frames /
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COALESCE_PENDING_LIMIT_UNIT);
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set_rx_coal = true;
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}
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if (coal->tx_coalesce_usecs || coal->tx_max_coalesced_frames) {
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tx_intr_coal.coalesce_timer_cfg =
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(u8)(coal->tx_coalesce_usecs / COALESCE_TIMER_CFG_UNIT);
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tx_intr_coal.pending_limt = (u8)(coal->tx_max_coalesced_frames /
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COALESCE_PENDING_LIMIT_UNIT);
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set_tx_coal = true;
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}
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if (queue == COALESCE_ALL_QUEUE) {
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ori_rx_intr_coal = &nic_dev->rx_intr_coalesce[0];
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ori_tx_intr_coal = &nic_dev->tx_intr_coalesce[0];
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err = snprintf(obj_str, OBJ_STR_MAX_LEN, "for netdev");
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} else {
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ori_rx_intr_coal = &nic_dev->rx_intr_coalesce[queue];
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ori_tx_intr_coal = &nic_dev->tx_intr_coalesce[queue];
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err = snprintf(obj_str, OBJ_STR_MAX_LEN, "for queue %d", queue);
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}
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if (err <= 0 || err >= OBJ_STR_MAX_LEN) {
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netif_err(nic_dev, drv, netdev, "Failed to snprintf string, function return(%d) and dest_len(%d)\n",
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err, OBJ_STR_MAX_LEN);
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return -EFAULT;
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}
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/* setting coalesce timer or pending limit to zero will disable
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* coalesce
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*/
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if (set_rx_coal && (!rx_intr_coal.coalesce_timer_cfg ||
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!rx_intr_coal.pending_limt))
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netif_warn(nic_dev, drv, netdev, "RX coalesce will be disabled\n");
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if (set_tx_coal && (!tx_intr_coal.coalesce_timer_cfg ||
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!tx_intr_coal.pending_limt))
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netif_warn(nic_dev, drv, netdev, "TX coalesce will be disabled\n");
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if (set_rx_coal) {
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err = __set_hw_coal_param(nic_dev, &rx_intr_coal, queue, true);
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if (err)
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return err;
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}
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if (set_tx_coal) {
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err = __set_hw_coal_param(nic_dev, &tx_intr_coal, queue, false);
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if (err)
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return err;
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}
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return 0;
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}
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static int hinic_get_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *coal)
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{
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return __hinic_get_coalesce(netdev, coal, COALESCE_ALL_QUEUE);
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}
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static int hinic_set_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *coal)
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{
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return __hinic_set_coalesce(netdev, coal, COALESCE_ALL_QUEUE);
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}
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static int hinic_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
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struct ethtool_coalesce *coal)
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{
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return __hinic_get_coalesce(netdev, coal, queue);
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}
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static int hinic_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
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struct ethtool_coalesce *coal)
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{
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return __hinic_set_coalesce(netdev, coal, queue);
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}
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static void hinic_get_pauseparam(struct net_device *netdev,
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struct ethtool_pauseparam *pause)
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{
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@ -1293,12 +1509,21 @@ static void hinic_get_strings(struct net_device *netdev,
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}
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static const struct ethtool_ops hinic_ethtool_ops = {
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.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
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ETHTOOL_COALESCE_RX_MAX_FRAMES |
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ETHTOOL_COALESCE_TX_USECS |
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ETHTOOL_COALESCE_TX_MAX_FRAMES,
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.get_link_ksettings = hinic_get_link_ksettings,
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.set_link_ksettings = hinic_set_link_ksettings,
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.get_drvinfo = hinic_get_drvinfo,
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.get_link = ethtool_op_get_link,
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.get_ringparam = hinic_get_ringparam,
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.set_ringparam = hinic_set_ringparam,
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.get_coalesce = hinic_get_coalesce,
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.set_coalesce = hinic_set_coalesce,
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.get_per_queue_coalesce = hinic_get_per_queue_coalesce,
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.set_per_queue_coalesce = hinic_set_per_queue_coalesce,
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.get_pauseparam = hinic_get_pauseparam,
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.set_pauseparam = hinic_set_pauseparam,
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.get_channels = hinic_get_channels,
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@ -1315,11 +1540,20 @@ static const struct ethtool_ops hinic_ethtool_ops = {
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};
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static const struct ethtool_ops hinicvf_ethtool_ops = {
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.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
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ETHTOOL_COALESCE_RX_MAX_FRAMES |
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ETHTOOL_COALESCE_TX_USECS |
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ETHTOOL_COALESCE_TX_MAX_FRAMES,
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.get_link_ksettings = hinic_get_link_ksettings,
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.get_drvinfo = hinic_get_drvinfo,
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.get_link = ethtool_op_get_link,
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.get_ringparam = hinic_get_ringparam,
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.set_ringparam = hinic_set_ringparam,
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.get_coalesce = hinic_get_coalesce,
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.set_coalesce = hinic_set_coalesce,
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.get_per_queue_coalesce = hinic_get_per_queue_coalesce,
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.set_per_queue_coalesce = hinic_set_per_queue_coalesce,
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.get_channels = hinic_get_channels,
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.set_channels = hinic_set_channels,
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.get_rxnfc = hinic_get_rxnfc,
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@ -705,6 +705,68 @@ static int hinic_l2nic_reset(struct hinic_hwdev *hwdev)
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return 0;
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}
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int hinic_get_interrupt_cfg(struct hinic_hwdev *hwdev,
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struct hinic_msix_config *interrupt_info)
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{
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u16 out_size = sizeof(*interrupt_info);
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struct hinic_pfhwdev *pfhwdev;
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int err;
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if (!hwdev || !interrupt_info)
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return -EINVAL;
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pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);
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interrupt_info->func_id = HINIC_HWIF_FUNC_IDX(hwdev->hwif);
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err = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_COMM,
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HINIC_COMM_CMD_MSI_CTRL_REG_RD_BY_UP,
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interrupt_info, sizeof(*interrupt_info),
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interrupt_info, &out_size, HINIC_MGMT_MSG_SYNC);
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if (err || !out_size || interrupt_info->status) {
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dev_err(&hwdev->hwif->pdev->dev, "Failed to get interrupt config, err: %d, status: 0x%x, out size: 0x%x\n",
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err, interrupt_info->status, out_size);
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return -EIO;
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}
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return 0;
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}
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int hinic_set_interrupt_cfg(struct hinic_hwdev *hwdev,
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struct hinic_msix_config *interrupt_info)
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{
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u16 out_size = sizeof(*interrupt_info);
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struct hinic_msix_config temp_info;
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struct hinic_pfhwdev *pfhwdev;
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int err;
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if (!hwdev)
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return -EINVAL;
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pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);
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interrupt_info->func_id = HINIC_HWIF_FUNC_IDX(hwdev->hwif);
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err = hinic_get_interrupt_cfg(hwdev, &temp_info);
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if (err)
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return -EINVAL;
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interrupt_info->lli_credit_cnt = temp_info.lli_timer_cnt;
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interrupt_info->lli_timer_cnt = temp_info.lli_timer_cnt;
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err = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_COMM,
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HINIC_COMM_CMD_MSI_CTRL_REG_WR_BY_UP,
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interrupt_info, sizeof(*interrupt_info),
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interrupt_info, &out_size, HINIC_MGMT_MSG_SYNC);
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if (err || !out_size || interrupt_info->status) {
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dev_err(&hwdev->hwif->pdev->dev, "Failed to get interrupt config, err: %d, status: 0x%x, out size: 0x%x\n",
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err, interrupt_info->status, out_size);
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return -EIO;
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}
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return 0;
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}
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/**
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* hinic_init_hwdev - Initialize the NIC HW
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* @pdev: the NIC pci device
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@ -285,6 +285,21 @@ struct hinic_cmd_l2nic_reset {
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u16 reset_flag;
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};
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struct hinic_msix_config {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u16 msix_index;
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u8 pending_cnt;
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u8 coalesce_timer_cnt;
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u8 lli_timer_cnt;
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u8 lli_credit_cnt;
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u8 resend_timer_cnt;
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u8 rsvd1[3];
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};
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struct hinic_hwdev {
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struct hinic_hwif *hwif;
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struct msix_entry *msix_entries;
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@ -378,4 +393,10 @@ int hinic_hwdev_hw_ci_addr_set(struct hinic_hwdev *hwdev, struct hinic_sq *sq,
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void hinic_hwdev_set_msix_state(struct hinic_hwdev *hwdev, u16 msix_index,
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enum hinic_msix_state flag);
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int hinic_get_interrupt_cfg(struct hinic_hwdev *hwdev,
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struct hinic_msix_config *interrupt_info);
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int hinic_set_interrupt_cfg(struct hinic_hwdev *hwdev,
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struct hinic_msix_config *interrupt_info);
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#endif
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@ -78,6 +78,9 @@ enum hinic_comm_cmd {
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|
||||
HINIC_COMM_CMD_CEQ_CTRL_REG_WR_BY_UP = 0x33,
|
||||
|
||||
HINIC_COMM_CMD_MSI_CTRL_REG_WR_BY_UP,
|
||||
HINIC_COMM_CMD_MSI_CTRL_REG_RD_BY_UP,
|
||||
|
||||
HINIC_COMM_CMD_L2NIC_RESET = 0x4b,
|
||||
|
||||
HINIC_COMM_CMD_PAGESIZE_SET = 0x50,
|
||||
|
||||
@ -69,6 +69,10 @@ MODULE_PARM_DESC(rx_weight, "Number Rx packets for NAPI budget (default=64)");
|
||||
|
||||
#define HINIC_WAIT_SRIOV_CFG_TIMEOUT 15000
|
||||
|
||||
#define HINIC_DEAULT_TXRX_MSIX_PENDING_LIMIT 2
|
||||
#define HINIC_DEAULT_TXRX_MSIX_COALESC_TIMER_CFG 32
|
||||
#define HINIC_DEAULT_TXRX_MSIX_RESEND_TIMER_CFG 7
|
||||
|
||||
static int change_mac_addr(struct net_device *netdev, const u8 *addr);
|
||||
|
||||
static int set_features(struct hinic_dev *nic_dev,
|
||||
@ -1021,6 +1025,45 @@ static int set_features(struct hinic_dev *nic_dev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hinic_init_intr_coalesce(struct hinic_dev *nic_dev)
|
||||
{
|
||||
u64 size;
|
||||
u16 i;
|
||||
|
||||
size = sizeof(struct hinic_intr_coal_info) * nic_dev->max_qps;
|
||||
nic_dev->rx_intr_coalesce = kzalloc(size, GFP_KERNEL);
|
||||
if (!nic_dev->rx_intr_coalesce)
|
||||
return -ENOMEM;
|
||||
nic_dev->tx_intr_coalesce = kzalloc(size, GFP_KERNEL);
|
||||
if (!nic_dev->tx_intr_coalesce) {
|
||||
kfree(nic_dev->rx_intr_coalesce);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
for (i = 0; i < nic_dev->max_qps; i++) {
|
||||
nic_dev->rx_intr_coalesce[i].pending_limt =
|
||||
HINIC_DEAULT_TXRX_MSIX_PENDING_LIMIT;
|
||||
nic_dev->rx_intr_coalesce[i].coalesce_timer_cfg =
|
||||
HINIC_DEAULT_TXRX_MSIX_COALESC_TIMER_CFG;
|
||||
nic_dev->rx_intr_coalesce[i].resend_timer_cfg =
|
||||
HINIC_DEAULT_TXRX_MSIX_RESEND_TIMER_CFG;
|
||||
nic_dev->tx_intr_coalesce[i].pending_limt =
|
||||
HINIC_DEAULT_TXRX_MSIX_PENDING_LIMIT;
|
||||
nic_dev->tx_intr_coalesce[i].coalesce_timer_cfg =
|
||||
HINIC_DEAULT_TXRX_MSIX_COALESC_TIMER_CFG;
|
||||
nic_dev->tx_intr_coalesce[i].resend_timer_cfg =
|
||||
HINIC_DEAULT_TXRX_MSIX_RESEND_TIMER_CFG;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void hinic_free_intr_coalesce(struct hinic_dev *nic_dev)
|
||||
{
|
||||
kfree(nic_dev->tx_intr_coalesce);
|
||||
kfree(nic_dev->rx_intr_coalesce);
|
||||
}
|
||||
|
||||
/**
|
||||
* nic_dev_init - Initialize the NIC device
|
||||
* @pdev: the NIC pci device
|
||||
@ -1156,6 +1199,12 @@ static int nic_dev_init(struct pci_dev *pdev)
|
||||
|
||||
SET_NETDEV_DEV(netdev, &pdev->dev);
|
||||
|
||||
err = hinic_init_intr_coalesce(nic_dev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Failed to init_intr_coalesce\n");
|
||||
goto err_init_intr;
|
||||
}
|
||||
|
||||
err = register_netdev(netdev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Failed to register netdev\n");
|
||||
@ -1165,6 +1214,8 @@ static int nic_dev_init(struct pci_dev *pdev)
|
||||
return 0;
|
||||
|
||||
err_reg_netdev:
|
||||
hinic_free_intr_coalesce(nic_dev);
|
||||
err_init_intr:
|
||||
err_set_pfc:
|
||||
err_set_features:
|
||||
hinic_hwdev_cb_unregister(nic_dev->hwdev,
|
||||
@ -1279,6 +1330,8 @@ static void hinic_remove(struct pci_dev *pdev)
|
||||
|
||||
unregister_netdev(netdev);
|
||||
|
||||
hinic_free_intr_coalesce(nic_dev);
|
||||
|
||||
hinic_port_del_mac(nic_dev, netdev->dev_addr, 0);
|
||||
|
||||
hinic_hwdev_cb_unregister(nic_dev->hwdev,
|
||||
|
||||
@ -478,11 +478,15 @@ static irqreturn_t rx_irq(int irq, void *data)
|
||||
static int rx_request_irq(struct hinic_rxq *rxq)
|
||||
{
|
||||
struct hinic_dev *nic_dev = netdev_priv(rxq->netdev);
|
||||
struct hinic_msix_config interrupt_info = {0};
|
||||
struct hinic_intr_coal_info *intr_coal = NULL;
|
||||
struct hinic_hwdev *hwdev = nic_dev->hwdev;
|
||||
struct hinic_rq *rq = rxq->rq;
|
||||
struct hinic_qp *qp;
|
||||
int err;
|
||||
|
||||
qp = container_of(rq, struct hinic_qp, rq);
|
||||
|
||||
rx_add_napi(rxq);
|
||||
|
||||
hinic_hwdev_msix_set(hwdev, rq->msix_entry,
|
||||
@ -490,13 +494,26 @@ static int rx_request_irq(struct hinic_rxq *rxq)
|
||||
RX_IRQ_NO_LLI_TIMER, RX_IRQ_NO_CREDIT,
|
||||
RX_IRQ_NO_RESEND_TIMER);
|
||||
|
||||
intr_coal = &nic_dev->rx_intr_coalesce[qp->q_id];
|
||||
interrupt_info.msix_index = rq->msix_entry;
|
||||
interrupt_info.coalesce_timer_cnt = intr_coal->coalesce_timer_cfg;
|
||||
interrupt_info.pending_cnt = intr_coal->pending_limt;
|
||||
interrupt_info.resend_timer_cnt = intr_coal->resend_timer_cfg;
|
||||
|
||||
err = hinic_set_interrupt_cfg(hwdev, &interrupt_info);
|
||||
if (err) {
|
||||
netif_err(nic_dev, drv, rxq->netdev,
|
||||
"Failed to set RX interrupt coalescing attribute\n");
|
||||
rx_del_napi(rxq);
|
||||
return err;
|
||||
}
|
||||
|
||||
err = request_irq(rq->irq, rx_irq, 0, rxq->irq_name, rxq);
|
||||
if (err) {
|
||||
rx_del_napi(rxq);
|
||||
return err;
|
||||
}
|
||||
|
||||
qp = container_of(rq, struct hinic_qp, rq);
|
||||
cpumask_set_cpu(qp->q_id % num_online_cpus(), &rq->affinity_mask);
|
||||
return irq_set_affinity_hint(rq->irq, &rq->affinity_mask);
|
||||
}
|
||||
|
||||
@ -718,12 +718,17 @@ static irqreturn_t tx_irq(int irq, void *data)
|
||||
static int tx_request_irq(struct hinic_txq *txq)
|
||||
{
|
||||
struct hinic_dev *nic_dev = netdev_priv(txq->netdev);
|
||||
struct hinic_msix_config interrupt_info = {0};
|
||||
struct hinic_intr_coal_info *intr_coal = NULL;
|
||||
struct hinic_hwdev *hwdev = nic_dev->hwdev;
|
||||
struct hinic_hwif *hwif = hwdev->hwif;
|
||||
struct pci_dev *pdev = hwif->pdev;
|
||||
struct hinic_sq *sq = txq->sq;
|
||||
struct hinic_qp *qp;
|
||||
int err;
|
||||
|
||||
qp = container_of(sq, struct hinic_qp, sq);
|
||||
|
||||
tx_napi_add(txq, nic_dev->tx_weight);
|
||||
|
||||
hinic_hwdev_msix_set(nic_dev->hwdev, sq->msix_entry,
|
||||
@ -731,6 +736,20 @@ static int tx_request_irq(struct hinic_txq *txq)
|
||||
TX_IRQ_NO_LLI_TIMER, TX_IRQ_NO_CREDIT,
|
||||
TX_IRQ_NO_RESEND_TIMER);
|
||||
|
||||
intr_coal = &nic_dev->tx_intr_coalesce[qp->q_id];
|
||||
interrupt_info.msix_index = sq->msix_entry;
|
||||
interrupt_info.coalesce_timer_cnt = intr_coal->coalesce_timer_cfg;
|
||||
interrupt_info.pending_cnt = intr_coal->pending_limt;
|
||||
interrupt_info.resend_timer_cnt = intr_coal->resend_timer_cfg;
|
||||
|
||||
err = hinic_set_interrupt_cfg(hwdev, &interrupt_info);
|
||||
if (err) {
|
||||
netif_err(nic_dev, drv, txq->netdev,
|
||||
"Failed to set TX interrupt coalescing attribute\n");
|
||||
tx_napi_del(txq);
|
||||
return err;
|
||||
}
|
||||
|
||||
err = request_irq(sq->irq, tx_irq, 0, txq->irq_name, txq);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Failed to request Tx irq\n");
|
||||
|
||||
Loading…
Reference in New Issue
Block a user