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clk: sunxi: Add muxable ahb factors clock for sun5i and sun7i
The AHB clock on sun5i and sun7i are muxable divider clocks. Use a factors clock to support them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -20,6 +20,7 @@ Required properties:
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"allwinner,sun8i-a23-axi-clk" - for the AXI clock on A23
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"allwinner,sun4i-a10-axi-gates-clk" - for the AXI gates
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"allwinner,sun4i-a10-ahb-clk" - for the AHB clock
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"allwinner,sun5i-a13-ahb-clk" - for the AHB clock on A13
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"allwinner,sun9i-a80-ahb-clk" - for the AHB bus clocks on A80
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"allwinner,sun4i-a10-ahb-gates-clk" - for the AHB gates on A10
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"allwinner,sun5i-a13-ahb-gates-clk" - for the AHB gates on A13
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@ -481,6 +481,45 @@ static void sun6i_a31_get_pll6_factors(u32 *freq, u32 parent_rate,
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*n = DIV_ROUND_UP(div, (*k+1)) - 1;
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}
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/**
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* sun5i_a13_get_ahb_factors() - calculates m, p factors for AHB
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* AHB rate is calculated as follows
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* rate = parent_rate >> p
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*/
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static void sun5i_a13_get_ahb_factors(u32 *freq, u32 parent_rate,
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u8 *n, u8 *k, u8 *m, u8 *p)
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{
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u32 div;
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/* divide only */
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if (parent_rate < *freq)
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*freq = parent_rate;
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/*
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* user manual says valid speed is 8k ~ 276M, but tests show it
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* can work at speeds up to 300M, just after reparenting to pll6
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*/
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if (*freq < 8000)
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*freq = 8000;
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if (*freq > 300000000)
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*freq = 300000000;
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div = order_base_2(DIV_ROUND_UP(parent_rate, *freq));
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/* p = 0 ~ 3 */
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if (div > 3)
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div = 3;
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*freq = parent_rate >> div;
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/* we were called to round the frequency, we can now return */
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if (p == NULL)
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return;
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*p = div;
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}
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/**
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* sun4i_get_apb1_factors() - calculates m, p factors for APB1
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* APB1 rate is calculated as follows
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@ -616,6 +655,11 @@ static struct clk_factors_config sun6i_a31_pll6_config = {
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.n_start = 1,
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};
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static struct clk_factors_config sun5i_a13_ahb_config = {
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.pshift = 4,
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.pwidth = 2,
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};
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static struct clk_factors_config sun4i_apb1_config = {
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.mshift = 0,
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.mwidth = 5,
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@ -676,6 +720,13 @@ static const struct factors_data sun6i_a31_pll6_data __initconst = {
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.name = "pll6x2",
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};
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static const struct factors_data sun5i_a13_ahb_data __initconst = {
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.mux = 6,
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.muxmask = BIT(1) | BIT(0),
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.table = &sun5i_a13_ahb_config,
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.getter = sun5i_a13_get_ahb_factors,
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};
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static const struct factors_data sun4i_apb1_data __initconst = {
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.mux = 24,
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.muxmask = BIT(1) | BIT(0),
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@ -1184,6 +1235,7 @@ static const struct of_device_id clk_factors_match[] __initconst = {
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{.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,},
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{.compatible = "allwinner,sun8i-a23-pll1-clk", .data = &sun8i_a23_pll1_data,},
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{.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,},
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{.compatible = "allwinner,sun5i-a13-ahb-clk", .data = &sun5i_a13_ahb_data,},
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{.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,},
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{.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,},
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{}
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