AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-11-26 19:20:55 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: shmobile: r8a7740 dtsi: Change to using clock-indices

Browse Source 
With the addition of clock-indices in commit 8e33f91a0b ("clk:
shmobile: clk-mstp: change to using clock-indices"), we can change the
DTSes to use the generic property instead of the deprecated
vendor-specific property.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2014-11-10 19:49:35 +01:00 committed by Simon Horman
parent b5c107f03b
commit 9f04e56749
1 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/boot/dts/r8a7740.dtsi
View File

@ -453,7 +453,7 @@ subck_clks: subck_clks@e6150080 {
reg = <0xe6150080 4>;
clocks = <&sub_clk>, <&sub_clk>;
#clock-cells = <1>;
renesas,clock-indices = <
clock-indices = <
R8A7740_CLK_SUBCK R8A7740_CLK_SUBCK2
>;
clock-output-names =
@ -468,7 +468,7 @@ mstp1_clks: mstp1_clks@e6150134 {
<&cpg_clocks R8A7740_CLK_HPP>, <&sub_clk>,
<&cpg_clocks R8A7740_CLK_B>;
#clock-cells = <1>;
renesas,clock-indices = <
clock-indices = <
R8A7740_CLK_CEU21 R8A7740_CLK_CEU20 R8A7740_CLK_TMU0
R8A7740_CLK_LCDC1 R8A7740_CLK_IIC0 R8A7740_CLK_TMU1
R8A7740_CLK_LCDC0
@ -489,7 +489,7 @@ mstp2_clks: mstp2_clks@e6150138 {
<&sub_clk>, <&sub_clk>, <&sub_clk>,
<&sub_clk>;
#clock-cells = <1>;
renesas,clock-indices = <
clock-indices = <
R8A7740_CLK_SCIFA6 R8A7740_CLK_INTCA
R8A7740_CLK_SCIFA7
R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2
@ -518,7 +518,7 @@ mstp3_clks: mstp3_clks@e615013c {
<&cpg_clocks R8A7740_CLK_HP>,
<&cpg_clocks R8A7740_CLK_HP>;
#clock-cells = <1>;
renesas,clock-indices = <
clock-indices = <
R8A7740_CLK_CMT1 R8A7740_CLK_FSI R8A7740_CLK_IIC1
R8A7740_CLK_USBF R8A7740_CLK_SDHI0 R8A7740_CLK_SDHI1
R8A7740_CLK_MMC R8A7740_CLK_GETHER R8A7740_CLK_TPU0
@ -535,7 +535,7 @@ mstp4_clks: mstp4_clks@e6150140 {
<&cpg_clocks R8A7740_CLK_HP>,
<&cpg_clocks R8A7740_CLK_HP>;
#clock-cells = <1>;
renesas,clock-indices = <
clock-indices = <
R8A7740_CLK_USBH R8A7740_CLK_SDHI2
R8A7740_CLK_USBFUNC R8A7740_CLK_USBPHY
>;