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mips: dts: mscc: Add spi on Ocelot

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Add support for the SPI controller

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20101/
Cc: Mark Brown <broonie@kernel.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-spi@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Allan Nielsen <allan.nielsen@microsemi.com>
This commit is contained in:
Alexandre Belloni 2018-07-31 16:38:54 +02:00 committed by Paul Burton
parent 60bc84e227
commit 9eaf3ba5e0
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GPG Key ID: 3EA79FACB57500DD
1 changed files with 11 additions and 0 deletions
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11
arch/mips/boot/dts/mscc/ocelot.dtsi
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@ -91,6 +91,17 @@ uart2: serial@100800 {
status = "disabled";
};
spi: spi@101000 {
compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x101000 0x100>, <0x3c 0x18>;
interrupts = <9>;
clocks = <&ahb_clk>;
status = "disabled";
};
switch@1010000 {
compatible = "mscc,vsc7514-switch";
reg = <0x1010000 0x10000>,