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drm/amdgpu/smu11: add smu support for navi12
Same as other Navi asics. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -726,6 +726,7 @@ static int smu_set_funcs(struct amdgpu_device *adev)
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case CHIP_VEGA20:
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case CHIP_NAVI10:
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case CHIP_NAVI14:
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case CHIP_NAVI12:
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case CHIP_ARCTURUS:
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if (adev->pm.pp_feature & PP_OVERDRIVE_MASK)
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smu->od_enabled = true;
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@ -49,6 +49,7 @@ MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
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MODULE_FIRMWARE("amdgpu/arcturus_smc.bin");
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MODULE_FIRMWARE("amdgpu/navi10_smc.bin");
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MODULE_FIRMWARE("amdgpu/navi14_smc.bin");
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MODULE_FIRMWARE("amdgpu/navi12_smc.bin");
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#define SMU11_VOLTAGE_SCALE 4
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@ -166,6 +167,9 @@ static int smu_v11_0_init_microcode(struct smu_context *smu)
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case CHIP_NAVI14:
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chip_name = "navi14";
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break;
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case CHIP_NAVI12:
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chip_name = "navi12";
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break;
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default:
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BUG();
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}
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@ -1334,6 +1338,7 @@ static int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable)
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break;
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case CHIP_NAVI10:
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case CHIP_NAVI14:
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case CHIP_NAVI12:
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if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
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return 0;
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mutex_lock(&smu->mutex);
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@ -1758,6 +1763,7 @@ void smu_v11_0_set_smu_funcs(struct smu_context *smu)
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break;
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case CHIP_NAVI10:
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case CHIP_NAVI14:
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case CHIP_NAVI12:
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navi10_set_ppt_funcs(smu);
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break;
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default:
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