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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 21:50:53 +07:00
KVM: x86 emulator: introduce read cache
Introduce read cache which is needed for instruction that require more then one exit to userspace. After returning from userspace the instruction will be re-executed with cached read value. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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1c11e71357
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9de4157367
@ -186,6 +186,7 @@ struct decode_cache {
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unsigned long modrm_val;
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unsigned long modrm_val;
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struct fetch_cache fetch;
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struct fetch_cache fetch;
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struct read_cache io_read;
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struct read_cache io_read;
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struct read_cache mem_read;
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};
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};
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struct x86_emulate_ctxt {
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struct x86_emulate_ctxt {
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@ -1263,6 +1263,33 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
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return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
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}
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}
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static int read_emulated(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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unsigned long addr, void *dest, unsigned size)
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{
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int rc;
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struct read_cache *mc = &ctxt->decode.mem_read;
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while (size) {
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int n = min(size, 8u);
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size -= n;
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if (mc->pos < mc->end)
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goto read_cached;
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rc = ops->read_emulated(addr, mc->data + mc->end, n, ctxt->vcpu);
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if (rc != X86EMUL_CONTINUE)
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return rc;
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mc->end += n;
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read_cached:
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memcpy(dest, mc->data + mc->pos, n);
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mc->pos += n;
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dest += n;
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addr += n;
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}
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return X86EMUL_CONTINUE;
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}
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static int pio_in_emulated(struct x86_emulate_ctxt *ctxt,
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static int pio_in_emulated(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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struct x86_emulate_ops *ops,
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unsigned int size, unsigned short port,
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unsigned int size, unsigned short port,
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@ -1504,9 +1531,9 @@ static int emulate_pop(struct x86_emulate_ctxt *ctxt,
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struct decode_cache *c = &ctxt->decode;
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struct decode_cache *c = &ctxt->decode;
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int rc;
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int rc;
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rc = ops->read_emulated(register_address(c, ss_base(ctxt),
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rc = read_emulated(ctxt, ops, register_address(c, ss_base(ctxt),
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c->regs[VCPU_REGS_RSP]),
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c->regs[VCPU_REGS_RSP]),
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dest, len, ctxt->vcpu);
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dest, len);
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if (rc != X86EMUL_CONTINUE)
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if (rc != X86EMUL_CONTINUE)
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return rc;
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return rc;
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@ -2475,6 +2502,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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int saved_dst_type = c->dst.type;
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int saved_dst_type = c->dst.type;
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ctxt->interruptibility = 0;
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ctxt->interruptibility = 0;
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ctxt->decode.mem_read.pos = 0;
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/* Shadow copy of register state. Committed on successful emulation.
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/* Shadow copy of register state. Committed on successful emulation.
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* NOTE: we can copy them from vcpu as x86_decode_insn() doesn't
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* NOTE: we can copy them from vcpu as x86_decode_insn() doesn't
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@ -2529,20 +2557,16 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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}
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}
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if (c->src.type == OP_MEM) {
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if (c->src.type == OP_MEM) {
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rc = ops->read_emulated((unsigned long)c->src.ptr,
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rc = read_emulated(ctxt, ops, (unsigned long)c->src.ptr,
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&c->src.val,
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&c->src.val, c->src.bytes);
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c->src.bytes,
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ctxt->vcpu);
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if (rc != X86EMUL_CONTINUE)
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if (rc != X86EMUL_CONTINUE)
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goto done;
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goto done;
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c->src.orig_val = c->src.val;
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c->src.orig_val = c->src.val;
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}
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}
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if (c->src2.type == OP_MEM) {
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if (c->src2.type == OP_MEM) {
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rc = ops->read_emulated((unsigned long)c->src2.ptr,
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rc = read_emulated(ctxt, ops, (unsigned long)c->src2.ptr,
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&c->src2.val,
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&c->src2.val, c->src2.bytes);
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c->src2.bytes,
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ctxt->vcpu);
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if (rc != X86EMUL_CONTINUE)
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if (rc != X86EMUL_CONTINUE)
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goto done;
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goto done;
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}
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}
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@ -2553,8 +2577,8 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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if ((c->dst.type == OP_MEM) && !(c->d & Mov)) {
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if ((c->dst.type == OP_MEM) && !(c->d & Mov)) {
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/* optimisation - avoid slow emulated read if Mov */
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/* optimisation - avoid slow emulated read if Mov */
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rc = ops->read_emulated((unsigned long)c->dst.ptr, &c->dst.val,
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rc = read_emulated(ctxt, ops, (unsigned long)c->dst.ptr,
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c->dst.bytes, ctxt->vcpu);
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&c->dst.val, c->dst.bytes);
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if (rc != X86EMUL_CONTINUE)
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if (rc != X86EMUL_CONTINUE)
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goto done;
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goto done;
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}
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}
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@ -2981,7 +3005,11 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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(rc->end != 0 && rc->end == rc->pos))
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(rc->end != 0 && rc->end == rc->pos))
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ctxt->restart = false;
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ctxt->restart = false;
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}
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}
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/*
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* reset read cache here in case string instruction is restared
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* without decoding
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*/
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ctxt->decode.mem_read.end = 0;
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/* Commit shadow register state. */
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/* Commit shadow register state. */
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memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
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memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
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kvm_rip_write(ctxt->vcpu, c->eip);
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kvm_rip_write(ctxt->vcpu, c->eip);
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