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perf tools: Update Intel PT documentation
Update Intel PT documentation to describe new features. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Link: http://lkml.kernel.org/r/1437150840-31811-26-git-send-email-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Adrian Hunter
Arnaldo Carvalho de Melo
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9d1bf02ac3
@ -142,19 +142,21 @@ which is the same as
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-e intel_pt/tsc=1,noretcomp=0/
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Note there are now new config terms - see section 'config terms' further below.
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The config terms are listed in /sys/devices/intel_pt/format. They are bit
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fields within the config member of the struct perf_event_attr which is
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passed to the kernel by the perf_event_open system call. They correspond to bit
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fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions:
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$ for f in `ls /sys/devices/intel_pt/format`;do
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> echo $f
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> cat /sys/devices/intel_pt/format/$f
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> done
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noretcomp
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config:11
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tsc
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config:10
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$ grep -H . /sys/bus/event_source/devices/intel_pt/format/*
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/sys/bus/event_source/devices/intel_pt/format/cyc:config:1
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/sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22
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/sys/bus/event_source/devices/intel_pt/format/mtc:config:9
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/sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17
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/sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11
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/sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27
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/sys/bus/event_source/devices/intel_pt/format/tsc:config:10
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Note that the default config must be overridden for each term i.e.
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@ -209,9 +211,185 @@ perf_event_attr is displayed if the -vv option is used e.g.
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------------------------------------------------------------
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config terms
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------------
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The June 2015 version of Intel 64 and IA-32 Architectures Software Developer
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Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features.
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Some of the features are reflect in new config terms. All the config terms are
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described below.
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tsc Always supported. Produces TSC timestamp packets to provide
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timing information. In some cases it is possible to decode
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without timing information, for example a per-thread context
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that does not overlap executable memory maps.
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The default config selects tsc (i.e. tsc=1).
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noretcomp Always supported. Disables "return compression" so a TIP packet
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is produced when a function returns. Causes more packets to be
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produced but might make decoding more reliable.
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The default config does not select noretcomp (i.e. noretcomp=0).
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psb_period Allows the frequency of PSB packets to be specified.
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The PSB packet is a synchronization packet that provides a
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starting point for decoding or recovery from errors.
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Support for psb_period is indicated by:
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/sys/bus/event_source/devices/intel_pt/caps/psb_cyc
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which contains "1" if the feature is supported and "0"
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otherwise.
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Valid values are given by:
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/sys/bus/event_source/devices/intel_pt/caps/psb_periods
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which contains a hexadecimal value, the bits of which represent
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valid values e.g. bit 2 set means value 2 is valid.
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The psb_period value is converted to the approximate number of
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trace bytes between PSB packets as:
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2 ^ (value + 11)
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e.g. value 3 means 16KiB bytes between PSBs
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If an invalid value is entered, the error message
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will give a list of valid values e.g.
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$ perf record -e intel_pt/psb_period=15/u uname
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Invalid psb_period for intel_pt. Valid values are: 0-5
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If MTC packets are selected, the default config selects a value
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of 3 (i.e. psb_period=3) or the nearest lower value that is
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supported (0 is always supported). Otherwise the default is 0.
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If decoding is expected to be reliable and the buffer is large
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then a large PSB period can be used.
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Because a TSC packet is produced with PSB, the PSB period can
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also affect the granularity to timing information in the absence
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of MTC or CYC.
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mtc Produces MTC timing packets.
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MTC packets provide finer grain timestamp information than TSC
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packets. MTC packets record time using the hardware crystal
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clock (CTC) which is related to TSC packets using a TMA packet.
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Support for this feature is indicated by:
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/sys/bus/event_source/devices/intel_pt/caps/mtc
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which contains "1" if the feature is supported and
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"0" otherwise.
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The frequency of MTC packets can also be specified - see
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mtc_period below.
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mtc_period Specifies how frequently MTC packets are produced - see mtc
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above for how to determine if MTC packets are supported.
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Valid values are given by:
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/sys/bus/event_source/devices/intel_pt/caps/mtc_periods
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which contains a hexadecimal value, the bits of which represent
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valid values e.g. bit 2 set means value 2 is valid.
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The mtc_period value is converted to the MTC frequency as:
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CTC-frequency / (2 ^ value)
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e.g. value 3 means one eighth of CTC-frequency
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Where CTC is the hardware crystal clock, the frequency of which
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can be related to TSC via values provided in cpuid leaf 0x15.
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If an invalid value is entered, the error message
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will give a list of valid values e.g.
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$ perf record -e intel_pt/mtc_period=15/u uname
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Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9
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The default value is 3 or the nearest lower value
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that is supported (0 is always supported).
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cyc Produces CYC timing packets.
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CYC packets provide even finer grain timestamp information than
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MTC and TSC packets. A CYC packet contains the number of CPU
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cycles since the last CYC packet. Unlike MTC and TSC packets,
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CYC packets are only sent when another packet is also sent.
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Support for this feature is indicated by:
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/sys/bus/event_source/devices/intel_pt/caps/psb_cyc
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which contains "1" if the feature is supported and
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"0" otherwise.
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The number of CYC packets produced can be reduced by specifying
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a threshold - see cyc_thresh below.
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cyc_thresh Specifies how frequently CYC packets are produced - see cyc
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above for how to determine if CYC packets are supported.
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Valid cyc_thresh values are given by:
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/sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds
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which contains a hexadecimal value, the bits of which represent
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valid values e.g. bit 2 set means value 2 is valid.
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The cyc_thresh value represents the minimum number of CPU cycles
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that must have passed before a CYC packet can be sent. The
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number of CPU cycles is:
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2 ^ (value - 1)
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e.g. value 4 means 8 CPU cycles must pass before a CYC packet
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can be sent. Note a CYC packet is still only sent when another
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packet is sent, not at, e.g. every 8 CPU cycles.
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If an invalid value is entered, the error message
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will give a list of valid values e.g.
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$ perf record -e intel_pt/cyc,cyc_thresh=15/u uname
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Invalid cyc_thresh for intel_pt. Valid values are: 0-12
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CYC packets are not requested by default.
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no_force_psb This is a driver option and is not in the IA32_RTIT_CTL MSR.
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It stops the driver resetting the byte count to zero whenever
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enabling the trace (for example on context switches) which in
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turn results in no PSB being forced. However some processors
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will produce a PSB anyway.
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In any case, there is still a PSB when the trace is enabled for
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the first time.
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no_force_psb can be used to slightly decrease the trace size but
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may make it harder for the decoder to recover from errors.
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no_force_psb is not selected by default.
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new snapshot option
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-------------------
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The difference between full trace and snapshot from the kernel's perspective is
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that in full trace we don't overwrite trace data that the user hasn't collected
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yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let
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the trace run and overwrite older data in the buffer so that whenever something
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interesting happens, we can stop it and grab a snapshot of what was going on
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around that interesting moment.
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To select snapshot mode a new option has been added:
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-S
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