mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 20:27:28 +07:00
mlxsw: spectrum_buffers: Prevent changing CPU port's configuration
Next patch is going to register the CPU port with devlink, but only so that the CPU port's shared buffer configuration and occupancy could be queried. Prevent changing CPU port's shared buffer threshold and binding configuration. Signed-off-by: Shalom Toledo <shalomt@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
b63e1a02d7
commit
9d0aa053ea
@ -1085,6 +1085,11 @@ int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
|
||||
u32 max_buff;
|
||||
int err;
|
||||
|
||||
if (local_port == MLXSW_PORT_CPU_PORT) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Changing CPU port's threshold is forbidden");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = mlxsw_sp_sb_threshold_in(mlxsw_sp, pool_index,
|
||||
threshold, &max_buff, extack);
|
||||
if (err)
|
||||
@ -1130,6 +1135,11 @@ int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
|
||||
u32 max_buff;
|
||||
int err;
|
||||
|
||||
if (local_port == MLXSW_PORT_CPU_PORT) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Changing CPU port's binding is forbidden");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (dir != mlxsw_sp->sb_vals->pool_dess[pool_index].dir) {
|
||||
NL_SET_ERR_MSG_MOD(extack, "Binding egress TC to ingress pool and vice versa is forbidden");
|
||||
return -EINVAL;
|
||||
|
Loading…
Reference in New Issue
Block a user