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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/amdgpu: move amdgpu_cs_sysvm_access_required into find_mapping
When we need to find the mapping we need sysvm access anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f5683f8b37
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drivers/gpu/drm/amd/amdgpu
@ -179,6 +179,7 @@ struct amdgpu_job;
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struct amdgpu_irq_src;
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struct amdgpu_fpriv;
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struct amdgpu_mn;
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struct amdgpu_bo_va_mapping;
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enum amdgpu_cp_irq {
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AMDGPU_CP_IRQ_GFX_EOP = 0,
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@ -1900,10 +1901,9 @@ static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
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static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
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#endif
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struct amdgpu_bo_va_mapping *
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amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
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uint64_t addr, struct amdgpu_bo **bo);
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int amdgpu_cs_sysvm_access_required(struct amdgpu_cs_parser *parser);
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int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
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uint64_t addr, struct amdgpu_bo **bo,
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struct amdgpu_bo_va_mapping **mapping);
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#include "amdgpu_object.h"
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#endif
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@ -921,11 +921,11 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
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uint64_t offset;
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uint8_t *kptr;
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m = amdgpu_cs_find_mapping(parser, chunk_ib->va_start,
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&aobj);
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if (!aobj) {
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r = amdgpu_cs_find_mapping(parser, chunk_ib->va_start,
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&aobj, &m);
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if (r) {
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DRM_ERROR("IB va_start is invalid\n");
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return -EINVAL;
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return r;
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}
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if ((chunk_ib->va_start + chunk_ib->ib_bytes) >
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@ -1475,15 +1475,16 @@ int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data,
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* virtual memory address. Returns allocation structure when found, NULL
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* otherwise.
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*/
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struct amdgpu_bo_va_mapping *
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amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
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uint64_t addr, struct amdgpu_bo **bo)
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int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
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uint64_t addr, struct amdgpu_bo **bo,
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struct amdgpu_bo_va_mapping **map)
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{
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struct amdgpu_bo_va_mapping *mapping;
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unsigned i;
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int r;
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if (!parser->bo_list)
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return NULL;
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return 0;
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addr /= AMDGPU_GPU_PAGE_SIZE;
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@ -1500,7 +1501,8 @@ amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
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continue;
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*bo = lobj->bo_va->base.bo;
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return mapping;
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*map = mapping;
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goto found;
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}
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list_for_each_entry(mapping, &lobj->bo_va->invalids, list) {
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@ -1509,44 +1511,22 @@ amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
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continue;
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*bo = lobj->bo_va->base.bo;
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return mapping;
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*map = mapping;
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goto found;
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}
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}
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return NULL;
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}
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return -EINVAL;
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/**
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* amdgpu_cs_sysvm_access_required - make BOs accessible by the system VM
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*
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* @parser: command submission parser context
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*
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* Helper for UVD/VCE VM emulation, make sure BOs are accessible by the system VM.
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*/
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int amdgpu_cs_sysvm_access_required(struct amdgpu_cs_parser *parser)
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{
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unsigned i;
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int r;
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found:
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r = amdgpu_ttm_bind(&(*bo)->tbo, &(*bo)->tbo.mem);
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if (unlikely(r))
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return r;
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if (!parser->bo_list)
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if ((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
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return 0;
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for (i = 0; i < parser->bo_list->num_entries; i++) {
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struct amdgpu_bo *bo = parser->bo_list->array[i].robj;
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r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
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if (unlikely(r))
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return r;
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if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
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continue;
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bo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
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amdgpu_ttm_placement_from_domain(bo, bo->allowed_domains);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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if (unlikely(r))
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return r;
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}
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return 0;
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(*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
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amdgpu_ttm_placement_from_domain(*bo, (*bo)->allowed_domains);
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return ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, false, false);
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}
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@ -410,10 +410,10 @@ static int amdgpu_uvd_cs_pass1(struct amdgpu_uvd_cs_ctx *ctx)
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uint64_t addr = amdgpu_uvd_get_addr_from_ctx(ctx);
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int r = 0;
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mapping = amdgpu_cs_find_mapping(ctx->parser, addr, &bo);
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if (mapping == NULL) {
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r = amdgpu_cs_find_mapping(ctx->parser, addr, &bo, &mapping);
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if (r) {
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DRM_ERROR("Can't find BO for addr 0x%08Lx\n", addr);
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return -EINVAL;
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return r;
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}
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if (!ctx->parser->adev->uvd.address_64_bit) {
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@ -737,10 +737,10 @@ static int amdgpu_uvd_cs_pass2(struct amdgpu_uvd_cs_ctx *ctx)
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uint64_t addr = amdgpu_uvd_get_addr_from_ctx(ctx);
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int r;
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mapping = amdgpu_cs_find_mapping(ctx->parser, addr, &bo);
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if (mapping == NULL) {
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r = amdgpu_cs_find_mapping(ctx->parser, addr, &bo, &mapping);
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if (r) {
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DRM_ERROR("Can't find BO for addr 0x%08Lx\n", addr);
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return -EINVAL;
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return r;
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}
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start = amdgpu_bo_gpu_offset(bo);
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@ -917,10 +917,6 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)
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return -EINVAL;
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}
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r = amdgpu_cs_sysvm_access_required(parser);
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if (r)
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return r;
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ctx.parser = parser;
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ctx.buf_sizes = buf_sizes;
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ctx.ib_idx = ib_idx;
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@ -559,6 +559,7 @@ static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx,
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struct amdgpu_bo_va_mapping *mapping;
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struct amdgpu_bo *bo;
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uint64_t addr;
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int r;
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if (index == 0xffffffff)
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index = 0;
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@ -567,11 +568,11 @@ static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx,
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((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32;
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addr += ((uint64_t)size) * ((uint64_t)index);
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mapping = amdgpu_cs_find_mapping(p, addr, &bo);
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if (mapping == NULL) {
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r = amdgpu_cs_find_mapping(p, addr, &bo, &mapping);
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if (r) {
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DRM_ERROR("Can't find BO for addr 0x%010Lx %d %d %d %d\n",
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addr, lo, hi, size, index);
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return -EINVAL;
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return r;
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}
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if ((addr + (uint64_t)size) >
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@ -652,10 +653,6 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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p->job->vm = NULL;
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ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo);
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r = amdgpu_cs_sysvm_access_required(p);
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if (r)
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return r;
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while (idx < ib->length_dw) {
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uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);
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uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);
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