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drm/i915: Unify skylake plane update
Don't handle skylake primary plane separately as it is similar plane as the others. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1508270891-22186-4-git-send-email-juhapekka.heikkila@gmail.com
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@ -3541,77 +3541,6 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
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return plane_ctl;
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}
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static void skylake_update_primary_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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const struct drm_framebuffer *fb = plane_state->base.fb;
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enum plane_id plane_id = plane->id;
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enum pipe pipe = plane->pipe;
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u32 plane_ctl = plane_state->ctl;
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unsigned int rotation = plane_state->base.rotation;
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u32 stride = skl_plane_stride(fb, 0, rotation);
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u32 aux_stride = skl_plane_stride(fb, 1, rotation);
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u32 surf_addr = plane_state->main.offset;
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int scaler_id = plane_state->scaler_id;
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int src_x = plane_state->main.x;
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int src_y = plane_state->main.y;
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int src_w = drm_rect_width(&plane_state->base.src) >> 16;
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int src_h = drm_rect_height(&plane_state->base.src) >> 16;
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int dst_x = plane_state->base.dst.x1;
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int dst_y = plane_state->base.dst.y1;
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int dst_w = drm_rect_width(&plane_state->base.dst);
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int dst_h = drm_rect_height(&plane_state->base.dst);
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unsigned long irqflags;
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/* Sizes are 0 based */
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src_w--;
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src_h--;
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dst_w--;
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dst_h--;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
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I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
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PLANE_COLOR_PIPE_GAMMA_ENABLE |
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PLANE_COLOR_PIPE_CSC_ENABLE |
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PLANE_COLOR_PLANE_GAMMA_DISABLE);
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}
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I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl);
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I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x);
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I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride);
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I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w);
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I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id),
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(plane_state->aux.offset - surf_addr) | aux_stride);
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I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id),
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(plane_state->aux.y << 16) | plane_state->aux.x);
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if (scaler_id >= 0) {
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uint32_t ps_ctrl = 0;
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WARN_ON(!dst_w || !dst_h);
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ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane_id) |
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crtc_state->scaler_state.scalers[scaler_id].mode;
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I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
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I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
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I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (dst_x << 16) | dst_y);
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I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h);
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I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0);
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} else {
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I915_WRITE_FW(PLANE_POS(pipe, plane_id), (dst_y << 16) | dst_x);
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}
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I915_WRITE_FW(PLANE_SURF(pipe, plane_id),
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intel_plane_ggtt_offset(plane_state) + surf_addr);
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POSTING_READ_FW(PLANE_SURF(pipe, plane_id));
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spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
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}
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static void skylake_disable_primary_plane(struct intel_plane *primary,
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struct intel_crtc *crtc)
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{
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@ -13284,7 +13213,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
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num_formats = ARRAY_SIZE(skl_primary_formats);
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modifiers = skl_format_modifiers_ccs;
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primary->update_plane = skylake_update_primary_plane;
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primary->update_plane = skl_update_plane;
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primary->disable_plane = skylake_disable_primary_plane;
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} else if (INTEL_GEN(dev_priv) >= 9) {
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intel_primary_formats = skl_primary_formats;
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@ -13294,7 +13223,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
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else
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modifiers = skl_format_modifiers_noccs;
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primary->update_plane = skylake_update_primary_plane;
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primary->update_plane = skl_update_plane;
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primary->disable_plane = skylake_disable_primary_plane;
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} else if (INTEL_GEN(dev_priv) >= 4) {
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intel_primary_formats = i965_primary_formats;
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@ -1922,6 +1922,9 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state);
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void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state);
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void skl_update_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state);
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/* intel_tv.c */
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void intel_tv_init(struct drm_i915_private *dev_priv);
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@ -230,7 +230,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
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#endif
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}
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static void
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void
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skl_update_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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