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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 06:20:53 +07:00
ssb: Fix PCMCIA lowlevel register access
This fixes lowlevel register access for PCMCIA based devices. The patch also adds a temporary workaround for the device mac address. It simply adds generation of a random address. The real SPROM extraction will follow in another patch. The temporary workaround will be removed then, but for now it's OK. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -94,7 +94,6 @@ int ssb_pcmcia_switch_core(struct ssb_bus *bus,
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struct ssb_device *dev)
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{
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int err;
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unsigned long flags;
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#if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
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ssb_printk(KERN_INFO PFX
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@ -103,11 +102,9 @@ int ssb_pcmcia_switch_core(struct ssb_bus *bus,
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dev->core_index);
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#endif
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spin_lock_irqsave(&bus->bar_lock, flags);
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err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
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if (!err)
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bus->mapped_device = dev;
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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return err;
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}
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@ -115,14 +112,12 @@ int ssb_pcmcia_switch_core(struct ssb_bus *bus,
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int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg)
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{
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int attempts = 0;
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unsigned long flags;
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conf_reg_t reg;
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int res, err = 0;
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int res;
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SSB_WARN_ON((seg != 0) && (seg != 1));
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reg.Offset = 0x34;
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reg.Function = 0;
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spin_lock_irqsave(&bus->bar_lock, flags);
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while (1) {
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reg.Action = CS_WRITE;
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reg.Value = seg;
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@ -143,13 +138,11 @@ int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg)
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udelay(10);
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}
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bus->mapped_pcmcia_seg = seg;
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out_unlock:
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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return err;
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return 0;
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error:
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ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
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err = -ENODEV;
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goto out_unlock;
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return -ENODEV;
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}
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static int select_core_and_segment(struct ssb_device *dev,
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@ -182,22 +175,33 @@ static int select_core_and_segment(struct ssb_device *dev,
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static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset)
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{
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struct ssb_bus *bus = dev->bus;
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unsigned long flags;
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int err;
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u16 value = 0xFFFF;
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if (unlikely(select_core_and_segment(dev, &offset)))
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return 0xFFFF;
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spin_lock_irqsave(&bus->bar_lock, flags);
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err = select_core_and_segment(dev, &offset);
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if (likely(!err))
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value = readw(bus->mmio + offset);
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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return readw(bus->mmio + offset);
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return value;
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}
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static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset)
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{
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struct ssb_bus *bus = dev->bus;
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u32 lo, hi;
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unsigned long flags;
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int err;
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u32 lo = 0xFFFFFFFF, hi = 0xFFFFFFFF;
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if (unlikely(select_core_and_segment(dev, &offset)))
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return 0xFFFFFFFF;
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lo = readw(bus->mmio + offset);
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hi = readw(bus->mmio + offset + 2);
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spin_lock_irqsave(&bus->bar_lock, flags);
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err = select_core_and_segment(dev, &offset);
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if (likely(!err)) {
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lo = readw(bus->mmio + offset);
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hi = readw(bus->mmio + offset + 2);
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}
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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return (lo | (hi << 16));
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}
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@ -205,22 +209,31 @@ static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset)
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static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value)
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{
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struct ssb_bus *bus = dev->bus;
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unsigned long flags;
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int err;
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if (unlikely(select_core_and_segment(dev, &offset)))
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return;
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writew(value, bus->mmio + offset);
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spin_lock_irqsave(&bus->bar_lock, flags);
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err = select_core_and_segment(dev, &offset);
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if (likely(!err))
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writew(value, bus->mmio + offset);
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mmiowb();
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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}
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static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value)
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{
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struct ssb_bus *bus = dev->bus;
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unsigned long flags;
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int err;
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if (unlikely(select_core_and_segment(dev, &offset)))
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return;
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writeb((value & 0xFF000000) >> 24, bus->mmio + offset + 3);
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writeb((value & 0x00FF0000) >> 16, bus->mmio + offset + 2);
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writeb((value & 0x0000FF00) >> 8, bus->mmio + offset + 1);
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writeb((value & 0x000000FF) >> 0, bus->mmio + offset + 0);
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spin_lock_irqsave(&bus->bar_lock, flags);
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err = select_core_and_segment(dev, &offset);
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if (likely(!err)) {
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writew((value & 0x0000FFFF), bus->mmio + offset);
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writew(((value & 0xFFFF0000) >> 16), bus->mmio + offset + 2);
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}
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mmiowb();
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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}
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/* Not "static", as it's used in main.c */
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@ -231,10 +244,12 @@ const struct ssb_bus_ops ssb_pcmcia_ops = {
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.write32 = ssb_pcmcia_write32,
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};
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#include <linux/etherdevice.h>
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int ssb_pcmcia_get_invariants(struct ssb_bus *bus,
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struct ssb_init_invariants *iv)
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{
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//TODO
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random_ether_addr(iv->sprom.il0mac);
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return 0;
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}
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@ -231,7 +231,8 @@ struct ssb_bus {
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struct ssb_device *mapped_device;
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/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
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u8 mapped_pcmcia_seg;
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/* Lock for core and segment switching. */
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/* Lock for core and segment switching.
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* On PCMCIA-host busses this is used to protect the whole MMIO access. */
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spinlock_t bar_lock;
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/* The bus this backplane is running on. */
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