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ACPICA: Update FADT flag definitions
Add new flags in the Boot Architecture flags field. Update comments for all FADT flags. Add FADT version when each flag was defined. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -386,12 +386,12 @@ static int __init acpi_pci_init(void)
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{
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{
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int ret;
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int ret;
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if (acpi_gbl_FADT.boot_flags & BAF_MSI_NOT_SUPPORTED) {
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if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) {
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printk(KERN_INFO"ACPI FADT declares the system doesn't support MSI, so disable it\n");
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printk(KERN_INFO"ACPI FADT declares the system doesn't support MSI, so disable it\n");
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pci_no_msi();
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pci_no_msi();
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}
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}
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if (acpi_gbl_FADT.boot_flags & BAF_PCIE_ASPM_CONTROL) {
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if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
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printk(KERN_INFO"ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
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printk(KERN_INFO"ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
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pcie_no_aspm();
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pcie_no_aspm();
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}
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}
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@ -214,11 +214,11 @@ struct acpi_table_fadt {
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u16 flush_size; /* Processor's memory cache line width, in bytes */
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u16 flush_size; /* Processor's memory cache line width, in bytes */
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u16 flush_stride; /* Number of flush strides that need to be read */
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u16 flush_stride; /* Number of flush strides that need to be read */
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u8 duty_offset; /* Processor duty cycle index in processor's P_CNT reg */
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u8 duty_offset; /* Processor duty cycle index in processor's P_CNT reg */
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u8 duty_width; /* Processor duty cycle value bit width in P_CNT register. */
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u8 duty_width; /* Processor duty cycle value bit width in P_CNT register */
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u8 day_alarm; /* Index to day-of-month alarm in RTC CMOS RAM */
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u8 day_alarm; /* Index to day-of-month alarm in RTC CMOS RAM */
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u8 month_alarm; /* Index to month-of-year alarm in RTC CMOS RAM */
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u8 month_alarm; /* Index to month-of-year alarm in RTC CMOS RAM */
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u8 century; /* Index to century in RTC CMOS RAM */
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u8 century; /* Index to century in RTC CMOS RAM */
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u16 boot_flags; /* IA-PC Boot Architecture Flags. See Table 5-10 for description */
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u16 boot_flags; /* IA-PC Boot Architecture Flags (see below for individual flags) */
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u8 reserved; /* Reserved, must be zero */
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u8 reserved; /* Reserved, must be zero */
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u32 flags; /* Miscellaneous flag bits (see below for individual flags) */
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u32 flags; /* Miscellaneous flag bits (see below for individual flags) */
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struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */
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struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */
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@ -236,32 +236,41 @@ struct acpi_table_fadt {
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struct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */
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struct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */
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};
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};
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/* FADT Boot Architecture Flags (boot_flags) */
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#define ACPI_FADT_LEGACY_DEVICES (1) /* 00: [V2] System has LPC or ISA bus devices */
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#define ACPI_FADT_8042 (1<<1) /* 01: [V3] System has an 8042 controller on port 60/64 */
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#define ACPI_FADT_NO_VGA (1<<2) /* 02: [V4] It is not safe to probe for VGA hardware */
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#define ACPI_FADT_NO_MSI (1<<3) /* 03: [V4] Message Signaled Interrupts (MSI) must not be enabled */
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#define ACPI_FADT_NO_ASPM (1<<4) /* 04: [V4] PCIe ASPM control must not be enabled */
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#define FADT2_REVISION_ID 3
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/* FADT flags */
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/* FADT flags */
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#define ACPI_FADT_WBINVD (1) /* 00: The wbinvd instruction works properly */
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#define ACPI_FADT_WBINVD (1) /* 00: [V1] The wbinvd instruction works properly */
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#define ACPI_FADT_WBINVD_FLUSH (1<<1) /* 01: The wbinvd flushes but does not invalidate */
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#define ACPI_FADT_WBINVD_FLUSH (1<<1) /* 01: [V1] wbinvd flushes but does not invalidate caches */
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#define ACPI_FADT_C1_SUPPORTED (1<<2) /* 02: All processors support C1 state */
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#define ACPI_FADT_C1_SUPPORTED (1<<2) /* 02: [V1] All processors support C1 state */
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#define ACPI_FADT_C2_MP_SUPPORTED (1<<3) /* 03: C2 state works on MP system */
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#define ACPI_FADT_C2_MP_SUPPORTED (1<<3) /* 03: [V1] C2 state works on MP system */
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#define ACPI_FADT_POWER_BUTTON (1<<4) /* 04: Power button is handled as a generic feature */
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#define ACPI_FADT_POWER_BUTTON (1<<4) /* 04: [V1] Power button is handled as a control method device */
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#define ACPI_FADT_SLEEP_BUTTON (1<<5) /* 05: Sleep button is handled as a generic feature, or not present */
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#define ACPI_FADT_SLEEP_BUTTON (1<<5) /* 05: [V1] Sleep button is handled as a control method device */
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#define ACPI_FADT_FIXED_RTC (1<<6) /* 06: RTC wakeup stat not in fixed register space */
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#define ACPI_FADT_FIXED_RTC (1<<6) /* 06: [V1] RTC wakeup status not in fixed register space */
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#define ACPI_FADT_S4_RTC_WAKE (1<<7) /* 07: RTC wakeup possible from S4 */
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#define ACPI_FADT_S4_RTC_WAKE (1<<7) /* 07: [V1] RTC alarm can wake system from S4 */
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#define ACPI_FADT_32BIT_TIMER (1<<8) /* 08: tmr_val is 32 bits 0=24-bits */
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#define ACPI_FADT_32BIT_TIMER (1<<8) /* 08: [V1] ACPI timer width is 32-bit (0=24-bit) */
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#define ACPI_FADT_DOCKING_SUPPORTED (1<<9) /* 09: Docking supported */
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#define ACPI_FADT_DOCKING_SUPPORTED (1<<9) /* 09: [V1] Docking supported */
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#define ACPI_FADT_RESET_REGISTER (1<<10) /* 10: System reset via the FADT RESET_REG supported */
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#define ACPI_FADT_RESET_REGISTER (1<<10) /* 10: [V2] System reset via the FADT RESET_REG supported */
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#define ACPI_FADT_SEALED_CASE (1<<11) /* 11: No internal expansion capabilities and case is sealed */
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#define ACPI_FADT_SEALED_CASE (1<<11) /* 11: [V3] No internal expansion capabilities and case is sealed */
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#define ACPI_FADT_HEADLESS (1<<12) /* 12: No local video capabilities or local input devices */
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#define ACPI_FADT_HEADLESS (1<<12) /* 12: [V3] No local video capabilities or local input devices */
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#define ACPI_FADT_SLEEP_TYPE (1<<13) /* 13: Must execute native instruction after writing SLP_TYPx register */
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#define ACPI_FADT_SLEEP_TYPE (1<<13) /* 13: [V3] Must execute native instruction after writing SLP_TYPx register */
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#define ACPI_FADT_PCI_EXPRESS_WAKE (1<<14) /* 14: System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */
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#define ACPI_FADT_PCI_EXPRESS_WAKE (1<<14) /* 14: [V4] System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */
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#define ACPI_FADT_PLATFORM_CLOCK (1<<15) /* 15: OSPM should use platform-provided timer (ACPI 3.0) */
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#define ACPI_FADT_PLATFORM_CLOCK (1<<15) /* 15: [V4] OSPM should use platform-provided timer (ACPI 3.0) */
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#define ACPI_FADT_S4_RTC_VALID (1<<16) /* 16: Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
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#define ACPI_FADT_S4_RTC_VALID (1<<16) /* 16: [V4] Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
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#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: System is compatible with remote power on (ACPI 3.0) */
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#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */
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#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: All local APICs must use cluster model (ACPI 3.0) */
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#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */
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#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: All local x_aPICs must use physical dest mode (ACPI 3.0) */
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#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local x_aPICs must use physical dest mode (ACPI 3.0) */
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/* FADT Prefered Power Management Profiles */
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/*
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* FADT Prefered Power Management Profiles
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*/
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enum acpi_prefered_pm_profiles {
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enum acpi_prefered_pm_profiles {
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PM_UNSPECIFIED = 0,
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PM_UNSPECIFIED = 0,
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PM_DESKTOP = 1,
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PM_DESKTOP = 1,
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@ -272,16 +281,6 @@ enum acpi_prefered_pm_profiles {
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PM_APPLIANCE_PC = 6
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PM_APPLIANCE_PC = 6
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};
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};
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/* FADT Boot Arch Flags */
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#define BAF_LEGACY_DEVICES 0x0001
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#define BAF_8042_KEYBOARD_CONTROLLER 0x0002
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#define BAF_MSI_NOT_SUPPORTED 0x0008
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#define BAF_PCIE_ASPM_CONTROL 0x0010
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#define FADT2_REVISION_ID 3
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#define FADT2_MINUS_REVISION_ID 2
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/* Reset to default packing */
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/* Reset to default packing */
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#pragma pack()
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#pragma pack()
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