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drm/amdgpu: add vcn nbio doorbell range setting for 2nd vcn instance
add vcn nbio doorbell range setting for 2nd vcn instance Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -674,7 +674,7 @@ struct amdgpu_nbio_funcs {
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void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
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bool use_doorbell, int doorbell_index, int doorbell_size);
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void (*vcn_doorbell_range)(struct amdgpu_device *adev, bool use_doorbell,
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int doorbell_index);
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int doorbell_index, int instance);
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void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
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bool enable);
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void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
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@ -92,7 +92,7 @@ static void nbio_v2_3_sdma_doorbell_range(struct amdgpu_device *adev, int instan
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}
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static void nbio_v2_3_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
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int doorbell_index)
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int doorbell_index, int instance)
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{
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u32 reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
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@ -42,6 +42,14 @@
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#define GPU_HDP_FLUSH_DONE__RSVD_ENG4_MASK 0x00010000L
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#define GPU_HDP_FLUSH_DONE__RSVD_ENG5_MASK 0x00020000L
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#define mmBIF_MMSCH1_DOORBELL_RANGE 0x01dc
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#define mmBIF_MMSCH1_DOORBELL_RANGE_BASE_IDX 2
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//BIF_MMSCH1_DOORBELL_RANGE
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#define BIF_MMSCH1_DOORBELL_RANGE__OFFSET__SHIFT 0x2
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#define BIF_MMSCH1_DOORBELL_RANGE__SIZE__SHIFT 0x10
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#define BIF_MMSCH1_DOORBELL_RANGE__OFFSET_MASK 0x00000FFCL
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#define BIF_MMSCH1_DOORBELL_RANGE__SIZE_MASK 0x001F0000L
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static void nbio_v7_4_remap_hdp_registers(struct amdgpu_device *adev)
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{
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WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL,
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@ -115,11 +123,17 @@ static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instan
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}
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static void nbio_v7_4_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
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int doorbell_index)
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int doorbell_index, int instance)
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{
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u32 reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
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u32 reg;
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u32 doorbell_range;
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u32 doorbell_range = RREG32(reg);
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if (instance)
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reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH1_DOORBELL_RANGE);
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else
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reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
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doorbell_range = RREG32(reg);
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if (use_doorbell) {
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doorbell_range = REG_SET_FIELD(doorbell_range,
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@ -245,7 +245,7 @@ static int vcn_v2_0_hw_init(void *handle)
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int i, r;
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adev->nbio_funcs->vcn_doorbell_range(adev, ring->use_doorbell,
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ring->doorbell_index);
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ring->doorbell_index, 0);
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ring->sched.ready = true;
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r = amdgpu_ring_test_ring(ring);
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@ -212,7 +212,7 @@ static int vcn_v2_5_hw_init(void *handle)
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int i, r;
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adev->nbio_funcs->vcn_doorbell_range(adev, ring->use_doorbell,
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ring->doorbell_index);
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ring->doorbell_index, 0);
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r = amdgpu_ring_test_ring(ring);
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if (r) {
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