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drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing

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Note that we also need this for skl.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
[danvet: Note that we also need this for skl, requested by Imre.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Nick Hoath 2015-04-10 13:12:25 +01:00 committed by Daniel Vetter
parent abab6311a5
commit 983b4b9def
2 changed files with 8 additions and 0 deletions
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1
drivers/gpu/drm/i915/i915_reg.h
View File

@ -6738,6 +6738,7 @@ enum skl_disp_power_wells {
#define GEN7_HALF_SLICE_CHICKEN1_GT2 0xf100
#define GEN7_MAX_PS_THREAD_DEP (8<<12)
#define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10)
#define GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE (1<<4)
#define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)
#define GEN9_HALF_SLICE_CHICKEN5 0xe188

7
drivers/gpu/drm/i915/intel_ringbuffer.c
View File

@ -1050,6 +1050,13 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
STALL_DOP_GATING_DISABLE);
/* WaDisableSbeCacheDispatchPortSharing:bxt */
if (INTEL_REVID(dev) <= BXT_REVID_B0) {
WA_SET_BIT_MASKED(
GEN7_HALF_SLICE_CHICKEN1,
GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
}
return 0;
}