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drm/amd/powerplay: support workload profile query and setup for vega20
Support the power profile API. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
Alex Deucher
parent
da958630d5
commit
982b903194
@ -384,10 +384,13 @@ static int vega20_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
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hwmgr->backend = data;
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hwmgr->workload_mask = 1 << hwmgr->workload_prority[PP_SMC_POWER_PROFILE_VIDEO];
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hwmgr->power_profile_mode = PP_SMC_POWER_PROFILE_VIDEO;
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hwmgr->default_power_profile_mode = PP_SMC_POWER_PROFILE_VIDEO;
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vega20_set_default_registry_data(hwmgr);
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data->disable_dpm_mask = 0xff;
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data->workload_mask = 0xff;
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/* need to set voltage control types before EVV patching */
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data->vddc_control = VEGA20_VOLTAGE_CONTROL_NONE;
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@ -1971,6 +1974,190 @@ static int vega20_power_off_asic(struct pp_hwmgr *hwmgr)
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return result;
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}
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static int vega20_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
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{
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DpmActivityMonitorCoeffInt_t activity_monitor;
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uint32_t i, size = 0;
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uint16_t workload_type = 0;
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static const char *profile_name[] = {
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"3D_FULL_SCREEN",
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"POWER_SAVING",
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"VIDEO",
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"VR",
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"COMPUTE",
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"CUSTOM"};
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static const char *title[] = {
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"PROFILE_INDEX(NAME)",
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"CLOCK_TYPE(NAME)",
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"FPS",
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"UseRlcBusy",
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"MinActiveFreqType",
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"MinActiveFreq",
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"BoosterFreqType",
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"BoosterFreq",
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"PD_Data_limit_c",
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"PD_Data_error_coeff",
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"PD_Data_error_rate_coeff"};
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int result = 0;
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if (!buf)
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return -EINVAL;
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size += sprintf(buf + size, "%16s %s %s %s %s %s %s %s %s %s %s\n",
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title[0], title[1], title[2], title[3], title[4], title[5],
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title[6], title[7], title[8], title[9], title[10]);
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for (i = 0; i <= PP_SMC_POWER_PROFILE_CUSTOM; i++) {
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/* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB_*_BIT */
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workload_type = i + 1;
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result = vega20_get_activity_monitor_coeff(hwmgr,
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(uint8_t *)(&activity_monitor), workload_type);
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PP_ASSERT_WITH_CODE(!result,
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"[GetPowerProfile] Failed to get activity monitor!",
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return result);
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size += sprintf(buf + size, "%2d(%14s%s)\n",
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i, profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ");
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size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
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" ",
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0,
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"GFXCLK",
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activity_monitor.Gfx_FPS,
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activity_monitor.Gfx_UseRlcBusy,
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activity_monitor.Gfx_MinActiveFreqType,
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activity_monitor.Gfx_MinActiveFreq,
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activity_monitor.Gfx_BoosterFreqType,
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activity_monitor.Gfx_BoosterFreq,
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activity_monitor.Gfx_PD_Data_limit_c,
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activity_monitor.Gfx_PD_Data_error_coeff,
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activity_monitor.Gfx_PD_Data_error_rate_coeff);
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size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
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" ",
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1,
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"SOCCLK",
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activity_monitor.Soc_FPS,
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activity_monitor.Soc_UseRlcBusy,
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activity_monitor.Soc_MinActiveFreqType,
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activity_monitor.Soc_MinActiveFreq,
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activity_monitor.Soc_BoosterFreqType,
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activity_monitor.Soc_BoosterFreq,
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activity_monitor.Soc_PD_Data_limit_c,
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activity_monitor.Soc_PD_Data_error_coeff,
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activity_monitor.Soc_PD_Data_error_rate_coeff);
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size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
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" ",
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2,
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"UCLK",
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activity_monitor.Mem_FPS,
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activity_monitor.Mem_UseRlcBusy,
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activity_monitor.Mem_MinActiveFreqType,
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activity_monitor.Mem_MinActiveFreq,
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activity_monitor.Mem_BoosterFreqType,
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activity_monitor.Mem_BoosterFreq,
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activity_monitor.Mem_PD_Data_limit_c,
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activity_monitor.Mem_PD_Data_error_coeff,
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activity_monitor.Mem_PD_Data_error_rate_coeff);
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size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
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" ",
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3,
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"FCLK",
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activity_monitor.Fclk_FPS,
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activity_monitor.Fclk_UseRlcBusy,
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activity_monitor.Fclk_MinActiveFreqType,
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activity_monitor.Fclk_MinActiveFreq,
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activity_monitor.Fclk_BoosterFreqType,
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activity_monitor.Fclk_BoosterFreq,
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activity_monitor.Fclk_PD_Data_limit_c,
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activity_monitor.Fclk_PD_Data_error_coeff,
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activity_monitor.Fclk_PD_Data_error_rate_coeff);
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}
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return size;
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}
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static int vega20_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size)
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{
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DpmActivityMonitorCoeffInt_t activity_monitor;
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int result = 0;
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hwmgr->power_profile_mode = input[size];
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if (hwmgr->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
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if (size < 10)
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return -EINVAL;
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result = vega20_get_activity_monitor_coeff(hwmgr,
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(uint8_t *)(&activity_monitor),
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WORKLOAD_PPLIB_CUSTOM_BIT);
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PP_ASSERT_WITH_CODE(!result,
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"[SetPowerProfile] Failed to get activity monitor!",
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return result);
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switch (input[0]) {
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case 0: /* Gfxclk */
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activity_monitor.Gfx_FPS = input[1];
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activity_monitor.Gfx_UseRlcBusy = input[2];
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activity_monitor.Gfx_MinActiveFreqType = input[3];
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activity_monitor.Gfx_MinActiveFreq = input[4];
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activity_monitor.Gfx_BoosterFreqType = input[5];
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activity_monitor.Gfx_BoosterFreq = input[6];
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activity_monitor.Gfx_PD_Data_limit_c = input[7];
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activity_monitor.Gfx_PD_Data_error_coeff = input[8];
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activity_monitor.Gfx_PD_Data_error_rate_coeff = input[9];
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break;
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case 1: /* Socclk */
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activity_monitor.Soc_FPS = input[1];
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activity_monitor.Soc_UseRlcBusy = input[2];
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activity_monitor.Soc_MinActiveFreqType = input[3];
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activity_monitor.Soc_MinActiveFreq = input[4];
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activity_monitor.Soc_BoosterFreqType = input[5];
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activity_monitor.Soc_BoosterFreq = input[6];
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activity_monitor.Soc_PD_Data_limit_c = input[7];
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activity_monitor.Soc_PD_Data_error_coeff = input[8];
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activity_monitor.Soc_PD_Data_error_rate_coeff = input[9];
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break;
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case 2: /* Uclk */
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activity_monitor.Mem_FPS = input[1];
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activity_monitor.Mem_UseRlcBusy = input[2];
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activity_monitor.Mem_MinActiveFreqType = input[3];
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activity_monitor.Mem_MinActiveFreq = input[4];
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activity_monitor.Mem_BoosterFreqType = input[5];
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activity_monitor.Mem_BoosterFreq = input[6];
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activity_monitor.Mem_PD_Data_limit_c = input[7];
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activity_monitor.Mem_PD_Data_error_coeff = input[8];
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activity_monitor.Mem_PD_Data_error_rate_coeff = input[9];
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break;
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case 3: /* Fclk */
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activity_monitor.Fclk_FPS = input[1];
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activity_monitor.Fclk_UseRlcBusy = input[2];
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activity_monitor.Fclk_MinActiveFreqType = input[3];
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activity_monitor.Fclk_MinActiveFreq = input[4];
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activity_monitor.Fclk_BoosterFreqType = input[5];
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activity_monitor.Fclk_BoosterFreq = input[6];
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activity_monitor.Fclk_PD_Data_limit_c = input[7];
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activity_monitor.Fclk_PD_Data_error_coeff = input[8];
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activity_monitor.Fclk_PD_Data_error_rate_coeff = input[9];
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break;
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}
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result = vega20_set_activity_monitor_coeff(hwmgr,
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(uint8_t *)(&activity_monitor),
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WORKLOAD_PPLIB_CUSTOM_BIT);
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PP_ASSERT_WITH_CODE(!result,
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"[SetPowerProfile] Failed to set activity monitor!",
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return result);
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}
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smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_SetWorkloadMask,
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1 << hwmgr->power_profile_mode);
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return 0;
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}
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static int vega20_notify_cac_buffer_info(struct pp_hwmgr *hwmgr,
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uint32_t virtual_addr_low,
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uint32_t virtual_addr_hi,
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@ -2053,6 +2240,10 @@ static const struct pp_hwmgr_func vega20_hwmgr_funcs = {
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/* UMD pstate, profile related */
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.force_dpm_level =
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vega20_dpm_force_dpm_level,
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.get_power_profile_mode =
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vega20_get_power_profile_mode,
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.set_power_profile_mode =
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vega20_set_power_profile_mode,
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.set_power_limit =
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vega20_set_power_limit,
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/* for sysfs to retrive/set gfxclk/memclk */
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