mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 20:20:50 +07:00
[ARM] Convert SA1111 to use clock architecture
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
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824b5b5e59
commit
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@ -26,6 +26,7 @@
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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@ -36,10 +37,6 @@
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#include <asm/hardware/sa1111.h>
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#ifdef CONFIG_ARCH_PXA
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#include <asm/arch/pxa-regs.h>
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#endif
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extern void __init sa1110_mb_enable(void);
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/*
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@ -51,6 +48,7 @@ extern void __init sa1110_mb_enable(void);
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*/
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struct sa1111 {
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struct device *dev;
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struct clk *clk;
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unsigned long phys;
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int irq;
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spinlock_t lock;
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@ -451,19 +449,7 @@ static void sa1111_wake(struct sa1111 *sachip)
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spin_lock_irqsave(&sachip->lock, flags);
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#ifdef CONFIG_ARCH_SA1100
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/*
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* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
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* (SA-1110 Developer's Manual, section 9.1.2.1)
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*/
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GAFR |= GPIO_32_768kHz;
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GPDR |= GPIO_32_768kHz;
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TUCR = TUCR_3_6864MHz;
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#elif CONFIG_ARCH_PXA
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pxa_gpio_mode(GPIO11_3_6MHz_MD);
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#else
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#error missing clock setup
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#endif
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clk_enable(sachip->clk);
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/*
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* Turn VCO on, and disable PLL Bypass.
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@ -641,6 +627,12 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
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memset(sachip, 0, sizeof(struct sa1111));
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sachip->clk = clk_get(me, "GPIO27_CLK");
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if (!sachip->clk) {
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ret = PTR_ERR(sachip->clk);
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goto err_free;
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}
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spin_lock_init(&sachip->lock);
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sachip->dev = me;
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@ -656,7 +648,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
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sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
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if (!sachip->base) {
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ret = -ENOMEM;
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goto out;
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goto err_clkput;
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}
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/*
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@ -666,7 +658,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
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if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
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printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
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ret = -ENODEV;
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goto unmap;
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goto err_unmap;
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}
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printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
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@ -726,9 +718,11 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
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return 0;
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unmap:
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err_unmap:
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iounmap(sachip->base);
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out:
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err_clkput:
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clk_put(sachip->clk);
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err_free:
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kfree(sachip);
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return ret;
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}
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@ -751,6 +745,8 @@ static void __sa1111_remove(struct sa1111 *sachip)
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sa1111_writel(0, irqbase + SA1111_WAKEEN0);
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sa1111_writel(0, irqbase + SA1111_WAKEEN1);
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clk_disable(sachip->clk);
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if (sachip->irq != NO_IRQ) {
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set_irq_chained_handler(sachip->irq, NULL);
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set_irq_data(sachip->irq, NULL);
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@ -759,6 +755,7 @@ static void __sa1111_remove(struct sa1111 *sachip)
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}
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iounmap(sachip->base);
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clk_put(sachip->clk);
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kfree(sachip);
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}
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@ -857,6 +854,8 @@ static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
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sa1111_writel(0, sachip->base + SA1111_SKPWM0);
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sa1111_writel(0, sachip->base + SA1111_SKPWM1);
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clk_disable(sachip->clk);
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spin_unlock_irqrestore(&sachip->lock, flags);
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return 0;
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@ -3,7 +3,7 @@
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#
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# Common support (must be linked before board specific support)
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obj-y += generic.o irq.o dma.o time.o
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obj-y += clock.o generic.o irq.o dma.o time.o
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obj-$(CONFIG_PXA25x) += pxa25x.o
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obj-$(CONFIG_PXA27x) += pxa27x.o
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124
arch/arm/mach-pxa/clock.c
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124
arch/arm/mach-pxa/clock.c
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@ -0,0 +1,124 @@
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/*
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* linux/arch/arm/mach-sa1100/clock.c
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/hardware.h>
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#include <asm/semaphore.h>
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struct clk {
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struct list_head node;
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unsigned long rate;
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struct module *owner;
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const char *name;
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unsigned int enabled;
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void (*enable)(void);
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void (*disable)(void);
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};
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static LIST_HEAD(clocks);
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static DECLARE_MUTEX(clocks_sem);
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static DEFINE_SPINLOCK(clocks_lock);
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *p, *clk = ERR_PTR(-ENOENT);
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down(&clocks_sem);
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list_for_each_entry(p, &clocks, node) {
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if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
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clk = p;
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break;
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}
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}
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up(&clocks_sem);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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module_put(clk->owner);
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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if (clk->enabled++ == 0)
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clk->enable();
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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WARN_ON(clk->enabled == 0);
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spin_lock_irqsave(&clocks_lock, flags);
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if (--clk->enabled == 0)
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clk->disable();
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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static void clk_gpio27_enable(void)
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{
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pxa_gpio_mode(GPIO11_3_6MHz_MD);
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}
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static void clk_gpio27_disable(void)
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{
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}
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static struct clk clk_gpio27 = {
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.name = "GPIO27_CLK",
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.rate = 3686400,
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.enable = clk_gpio27_enable,
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.disable = clk_gpio27_disable,
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};
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int clk_register(struct clk *clk)
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{
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down(&clocks_sem);
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list_add(&clk->node, &clocks);
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up(&clocks_sem);
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return 0;
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}
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EXPORT_SYMBOL(clk_register);
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void clk_unregister(struct clk *clk)
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{
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down(&clocks_sem);
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list_del(&clk->node);
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up(&clocks_sem);
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}
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EXPORT_SYMBOL(clk_unregister);
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static int __init clk_init(void)
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{
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clk_register(&clk_gpio27);
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return 0;
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}
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arch_initcall(clk_init);
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@ -3,7 +3,7 @@
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#
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# Common support
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obj-y := generic.o irq.o dma.o time.o
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obj-y := clock.o generic.o irq.o dma.o time.o #nmi-oopser.o
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obj-m :=
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obj-n :=
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obj- :=
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arch/arm/mach-sa1100/clock.c
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132
arch/arm/mach-sa1100/clock.c
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@ -0,0 +1,132 @@
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/*
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* linux/arch/arm/mach-sa1100/clock.c
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <asm/hardware.h>
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#include <asm/semaphore.h>
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struct clk {
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struct list_head node;
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unsigned long rate;
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struct module *owner;
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const char *name;
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unsigned int enabled;
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void (*enable)(void);
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void (*disable)(void);
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};
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static LIST_HEAD(clocks);
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static DECLARE_MUTEX(clocks_sem);
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static DEFINE_SPINLOCK(clocks_lock);
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *p, *clk = ERR_PTR(-ENOENT);
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down(&clocks_sem);
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list_for_each_entry(p, &clocks, node) {
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if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
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clk = p;
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break;
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}
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}
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up(&clocks_sem);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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module_put(clk->owner);
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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if (clk->enabled++ == 0)
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clk->enable();
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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WARN_ON(clk->enabled == 0);
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spin_lock_irqsave(&clocks_lock, flags);
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if (--clk->enabled == 0)
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clk->disable();
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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static void clk_gpio27_enable(void)
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{
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/*
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* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
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* (SA-1110 Developer's Manual, section 9.1.2.1)
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*/
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GAFR |= GPIO_32_768kHz;
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GPDR |= GPIO_32_768kHz;
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TUCR = TUCR_3_6864MHz;
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}
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static void clk_gpio27_disable(void)
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{
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TUCR = 0;
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GPDR &= ~GPIO_32_768kHz;
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GAFR &= ~GPIO_32_768kHz;
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}
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static struct clk clk_gpio27 = {
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.name = "GPIO27_CLK",
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.rate = 3686400,
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.enable = clk_gpio27_enable,
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.disable = clk_gpio27_disable,
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};
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int clk_register(struct clk *clk)
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{
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down(&clocks_sem);
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list_add(&clk->node, &clocks);
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up(&clocks_sem);
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return 0;
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}
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EXPORT_SYMBOL(clk_register);
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void clk_unregister(struct clk *clk)
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{
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down(&clocks_sem);
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list_del(&clk->node);
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up(&clocks_sem);
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}
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EXPORT_SYMBOL(clk_unregister);
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static int __init clk_init(void)
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{
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clk_register(&clk_gpio27);
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return 0;
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}
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arch_initcall(clk_init);
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