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MIPS: Loongson64: Define and use some CP0 registers

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Defines CP0_CONFIG3, CP0_CONFIG6, CP0_PAGEGRAIN and use them in
kernel-entry-init.h for Loongson64.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19264/
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <james.hogan@mips.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Huacai Chen <chenhuacai@gmail.com>
This commit is contained in:
Huacai Chen 2018-04-28 11:21:26 +08:00 committed by Paul Burton
parent 7cff3f1689
commit 97ab1bb490
No known key found for this signature in database
GPG Key ID: 3EA79FACB57500DD
2 changed files with 14 additions and 12 deletions
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24
arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
View File

@ -19,18 +19,18 @@
.set push
.set mips64
/* Set LPA on LOONGSON3 config3 */
mfc0 t0, $16, 3
mfc0 t0, CP0_CONFIG3
or t0, (0x1 << 7)
mtc0 t0, $16, 3
mtc0 t0, CP0_CONFIG3
/* Set ELPA on LOONGSON3 pagegrain */
mfc0 t0, $5, 1
mfc0 t0, CP0_PAGEGRAIN
or t0, (0x1 << 29)
mtc0 t0, $5, 1
mtc0 t0, CP0_PAGEGRAIN
#ifdef CONFIG_LOONGSON3_ENHANCEMENT
/* Enable STFill Buffer */
mfc0 t0, $16, 6
mfc0 t0, CP0_CONFIG6
or t0, 0x100
mtc0 t0, $16, 6
mtc0 t0, CP0_CONFIG6
#endif
_ehb
.set pop
@ -45,18 +45,18 @@
.set push
.set mips64
/* Set LPA on LOONGSON3 config3 */
mfc0 t0, $16, 3
mfc0 t0, CP0_CONFIG3
or t0, (0x1 << 7)
mtc0 t0, $16, 3
mtc0 t0, CP0_CONFIG3
/* Set ELPA on LOONGSON3 pagegrain */
mfc0 t0, $5, 1
mfc0 t0, CP0_PAGEGRAIN
or t0, (0x1 << 29)
mtc0 t0, $5, 1
mtc0 t0, CP0_PAGEGRAIN
#ifdef CONFIG_LOONGSON3_ENHANCEMENT
/* Enable STFill Buffer */
mfc0 t0, $16, 6
mfc0 t0, CP0_CONFIG6
or t0, 0x100
mtc0 t0, $16, 6
mtc0 t0, CP0_CONFIG6
#endif
_ehb
.set pop

2
arch/mips/include/asm/mipsregs.h
View File

@ -51,6 +51,7 @@
#define CP0_GLOBALNUMBER $3, 1
#define CP0_CONTEXT $4
#define CP0_PAGEMASK $5
#define CP0_PAGEGRAIN $5, 1
#define CP0_SEGCTL0 $5, 2
#define CP0_SEGCTL1 $5, 3
#define CP0_SEGCTL2 $5, 4
@ -77,6 +78,7 @@
#define CP0_CONFIG $16
#define CP0_CONFIG3 $16, 3
#define CP0_CONFIG5 $16, 5
#define CP0_CONFIG6 $16, 6
#define CP0_LLADDR $17
#define CP0_WATCHLO $18
#define CP0_WATCHHI $19