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dt-bindings: phy: convert phy-rockchip-inno-usb2 bindings to yaml
Current dts files for Rockchip with 'usb2-phy' subnodes are manually verified. In order to automate this process phy-rockchip-inno-usb2.txt has to be converted to yaml. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
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Johan Jonker
Rob Herring
parent
384d00fae8
commit
978e9c3ba0
@ -1,81 +0,0 @@
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ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
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Required properties (phy (parent) node):
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- compatible : should be one of the listed compatibles:
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* "rockchip,px30-usb2phy"
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* "rockchip,rk3228-usb2phy"
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* "rockchip,rk3328-usb2phy"
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* "rockchip,rk3366-usb2phy"
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* "rockchip,rk3399-usb2phy"
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* "rockchip,rv1108-usb2phy"
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- reg : the address offset of grf for usb-phy configuration.
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- #clock-cells : should be 0.
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- clock-output-names : specify the 480m output clock name.
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Optional properties:
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- clocks : phandle + phy specifier pair, for the input clock of phy.
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- clock-names : input clock name of phy, must be "phyclk".
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- assigned-clocks : phandle of usb 480m clock.
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- assigned-clock-parents : parent of usb 480m clock, select between
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usb-phy output 480m and xin24m.
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Refer to clk/clock-bindings.txt for generic clock
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consumer properties.
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- rockchip,usbgrf : phandle to the syscon managing the "usb general
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register files". When set driver will request its
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phandle as one companion-grf for some special SoCs
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(e.g RV1108).
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- extcon : phandle to the extcon device providing the cable state for
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the otg phy.
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Required nodes : a sub-node is required for each port the phy provides.
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The sub-node name is used to identify host or otg port,
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and shall be the following entries:
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* "otg-port" : the name of otg port.
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* "host-port" : the name of host port.
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Required properties (port (child) node):
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- #phy-cells : must be 0. See ./phy-bindings.txt for details.
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- interrupts : specify an interrupt for each entry in interrupt-names.
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- interrupt-names : a list which should be one of the following cases:
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Regular case:
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* "otg-id" : for the otg id interrupt.
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* "otg-bvalid" : for the otg vbus interrupt.
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* "linestate" : for the host/otg linestate interrupt.
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Some SoCs use one interrupt with the above muxed together, so for these
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* "otg-mux" : otg-port interrupt, which mux otg-id/otg-bvalid/linestate
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to one.
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Optional properties:
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- phy-supply : phandle to a regulator that provides power to VBUS.
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See ./phy-bindings.txt for details.
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Example:
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grf: syscon@ff770000 {
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compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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...
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u2phy: usb2-phy@700 {
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compatible = "rockchip,rk3366-usb2phy";
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reg = <0x700 0x2c>;
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#clock-cells = <0>;
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clock-output-names = "sclk_otgphy0_480m";
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u2phy_otg: otg-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "otg-id", "otg-bvalid", "linestate";
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};
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u2phy_host: host-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "linestate";
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};
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};
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};
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@ -0,0 +1,155 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip USB2.0 phy with inno IP block
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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enum:
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- rockchip,px30-usb2phy
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- rockchip,rk3228-usb2phy
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- rockchip,rk3328-usb2phy
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- rockchip,rk3366-usb2phy
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- rockchip,rk3399-usb2phy
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- rockchip,rv1108-usb2phy
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reg:
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maxItems: 1
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clock-output-names:
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description:
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The usb 480m output clock name.
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"#clock-cells":
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const: 0
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"#phy-cells":
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const: 0
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clocks:
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maxItems: 1
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clock-names:
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const: phyclk
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assigned-clocks:
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description:
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Phandle of the usb 480m clock.
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assigned-clock-parents:
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description:
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Parent of the usb 480m clock.
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Select between usb-phy output 480m and xin24m.
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Refer to clk/clock-bindings.txt for generic clock consumer properties.
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extcon:
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description:
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Phandle to the extcon device providing the cable state for the otg phy.
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rockchip,usbgrf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the syscon managing the 'usb general register files'.
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When set the driver will request its phandle as one companion-grf
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for some special SoCs (e.g rv1108).
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host-port:
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type: object
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additionalProperties: false
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properties:
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"#phy-cells":
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const: 0
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interrupts:
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description: host linestate interrupt
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interrupt-names:
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const: linestate
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phy-supply:
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description:
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Phandle to a regulator that provides power to VBUS.
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See ./phy-bindings.txt for details.
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required:
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- "#phy-cells"
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- interrupts
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- interrupt-names
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otg-port:
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type: object
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additionalProperties: false
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properties:
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"#phy-cells":
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const: 0
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interrupts:
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minItems: 1
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maxItems: 3
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interrupt-names:
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oneOf:
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- const: linestate
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- const: otg-mux
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- items:
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- const: otg-bvalid
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- const: otg-id
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- const: linestate
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phy-supply:
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description:
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Phandle to a regulator that provides power to VBUS.
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See ./phy-bindings.txt for details.
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required:
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- "#phy-cells"
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- interrupts
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- interrupt-names
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required:
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- compatible
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- reg
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- clock-output-names
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- "#clock-cells"
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- "#phy-cells"
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- host-port
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- otg-port
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3399-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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u2phy0: usb2-phy@e450 {
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compatible = "rockchip,rk3399-usb2phy";
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reg = <0xe450 0x10>;
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clocks = <&cru SCLK_USB2PHY0_REF>;
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clock-names = "phyclk";
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clock-output-names = "clk_usbphy0_480m";
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#clock-cells = <0>;
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#phy-cells = <0>;
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u2phy0_host: host-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "linestate";
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};
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u2phy0_otg: otg-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "otg-bvalid", "otg-id", "linestate";
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};
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};
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