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dt-bindings: display: renesas: lvds: Add EXTAL and DU_DOTCLKIN clocks
On the D3 and E3 SoCs, the LVDS encoder can derive its internal pixel clock from an externally supplied clock, either through the EXTAL pin or through one of the DU_DOTCLKINx pins. Add corresponding clocks to the DT bindings. To retain backward compatibility with DT that don't specify the clock-names property, the functional clock must always be specified first, and the clock-names property is optional when only the functional clock is specified. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
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@ -19,7 +19,17 @@ Required properties:
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- "renesas,r8a77995-lvds" for R8A77995 (R-Car D3) compatible LVDS encoders
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- reg: Base address and length for the memory-mapped registers
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- clocks: A phandle + clock-specifier pair for the functional clock
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- clocks: A list of phandles + clock-specifier pairs, one for each entry in
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the clock-names property.
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- clock-names: Name of the clocks. This property is model-dependent.
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- The functional clock, which mandatory for all models, shall be listed
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first, and shall be named "fck".
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- On R8A77990 and R8A77995, the LVDS encoder can use the EXTAL or
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DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be
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named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN
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numerical index.
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- When the clocks property only contains the functional clock, the
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clock-names property may be omitted.
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- resets: A phandle + reset specifier for the module reset
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Required nodes:
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