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irqchip/gic-v4.1: Add support for VPENDBASER's Dirty+Valid signaling
When a vPE is made resident, the GIC starts parsing the virtual pending table to deliver pending interrupts. This takes place asynchronously, and can at times take a long while. Long enough that the vcpu enters the guest and hits WFI before any interrupt has been signaled yet. The vcpu then exits, blocks, and now gets a doorbell. Rince, repeat. In order to avoid the above, a (optional on GICv4, mandatory on v4.1) feature allows the GIC to feedback to the hypervisor whether it is done parsing the VPT by clearing the GICR_VPENDBASER.Dirty bit. The hypervisor can then wait until the GIC is ready before actually running the vPE. Plug the detection code as well as polling on vPE schedule. While at it, tidy-up the kernel message that displays the GICv4 optional features. Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
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@ -14,6 +14,7 @@
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#include <linux/dma-iommu.h>
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#include <linux/efi.h>
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#include <linux/interrupt.h>
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#include <linux/iopoll.h>
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#include <linux/irqdomain.h>
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#include <linux/list.h>
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#include <linux/log2.h>
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@ -3672,6 +3673,20 @@ static int its_vpe_set_affinity(struct irq_data *d,
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return IRQ_SET_MASK_OK_DONE;
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}
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static void its_wait_vpt_parse_complete(void)
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{
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void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
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u64 val;
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if (!gic_rdists->has_vpend_valid_dirty)
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return;
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WARN_ON_ONCE(readq_relaxed_poll_timeout(vlpi_base + GICR_VPENDBASER,
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val,
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!(val & GICR_VPENDBASER_Dirty),
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10, 500));
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}
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static void its_vpe_schedule(struct its_vpe *vpe)
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{
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void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
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@ -3702,6 +3717,8 @@ static void its_vpe_schedule(struct its_vpe *vpe)
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val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0;
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val |= GICR_VPENDBASER_Valid;
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gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
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its_wait_vpt_parse_complete();
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}
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static void its_vpe_deschedule(struct its_vpe *vpe)
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@ -3910,6 +3927,8 @@ static void its_vpe_4_1_schedule(struct its_vpe *vpe,
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val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);
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gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
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its_wait_vpt_parse_complete();
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}
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static void its_vpe_4_1_deschedule(struct its_vpe *vpe,
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@ -873,6 +873,7 @@ static int __gic_update_rdist_properties(struct redist_region *region,
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gic_data.rdists.has_rvpeid &= !!(typer & GICR_TYPER_RVPEID);
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gic_data.rdists.has_direct_lpi &= (!!(typer & GICR_TYPER_DirectLPIS) |
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gic_data.rdists.has_rvpeid);
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gic_data.rdists.has_vpend_valid_dirty &= !!(typer & GICR_TYPER_DIRTY);
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/* Detect non-sensical configurations */
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if (WARN_ON_ONCE(gic_data.rdists.has_rvpeid && !gic_data.rdists.has_vlpis)) {
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@ -893,10 +894,11 @@ static void gic_update_rdist_properties(void)
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if (WARN_ON(gic_data.ppi_nr == UINT_MAX))
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gic_data.ppi_nr = 0;
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pr_info("%d PPIs implemented\n", gic_data.ppi_nr);
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pr_info("%sVLPI support, %sdirect LPI support, %sRVPEID support\n",
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!gic_data.rdists.has_vlpis ? "no " : "",
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!gic_data.rdists.has_direct_lpi ? "no " : "",
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!gic_data.rdists.has_rvpeid ? "no " : "");
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if (gic_data.rdists.has_vlpis)
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pr_info("GICv4 features: %s%s%s\n",
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gic_data.rdists.has_direct_lpi ? "DirectLPI " : "",
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gic_data.rdists.has_rvpeid ? "RVPEID " : "",
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gic_data.rdists.has_vpend_valid_dirty ? "Valid+Dirty " : "");
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}
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/* Check whether it's single security state view */
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@ -1620,6 +1622,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
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gic_data.rdists.has_rvpeid = true;
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gic_data.rdists.has_vlpis = true;
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gic_data.rdists.has_direct_lpi = true;
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gic_data.rdists.has_vpend_valid_dirty = true;
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if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdists.rdist)) {
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err = -ENOMEM;
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@ -243,6 +243,7 @@
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#define GICR_TYPER_PLPIS (1U << 0)
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#define GICR_TYPER_VLPIS (1U << 1)
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#define GICR_TYPER_DIRTY (1U << 2)
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#define GICR_TYPER_DirectLPIS (1U << 3)
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#define GICR_TYPER_LAST (1U << 4)
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#define GICR_TYPER_RVPEID (1U << 7)
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@ -686,6 +687,7 @@ struct rdists {
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bool has_vlpis;
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bool has_rvpeid;
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bool has_direct_lpi;
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bool has_vpend_valid_dirty;
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};
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struct irq_domain;
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