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blackfin: fix L1 data A overflow link issue
This patch fix below compile error:
"bfin-uclinux-ld: L1 data A overflow!"
It is due to the recent lib/gen_crc32table.c change:
46c5801eaf
crc32: bolt on crc32c
it added 8KiB more data to __cacheline_aligned which cause blackfin L1 data
cache overflow.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
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@ -823,7 +823,7 @@ config CACHELINE_ALIGNED_L1
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bool "Locate cacheline_aligned data to L1 Data Memory"
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bool "Locate cacheline_aligned data to L1 Data Memory"
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default y if !BF54x
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default y if !BF54x
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default n if BF54x
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default n if BF54x
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depends on !SMP && !BF531
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depends on !SMP && !BF531 && !CRC32
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help
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help
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If enabled, cacheline_aligned data is linked
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If enabled, cacheline_aligned data is linked
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into L1 data memory. (less latency)
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into L1 data memory. (less latency)
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