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net: stmmac: dwxgmac: Add Flexible PPS support
Add the support for Flexible PPS in XGMAC cores. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -149,6 +149,25 @@
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#define XGMAC_TXTIMESTAMP_NSEC 0x00000d30
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#define XGMAC_TXTSSTSLO GENMASK(30, 0)
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#define XGMAC_TXTIMESTAMP_SEC 0x00000d34
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#define XGMAC_PPS_CONTROL 0x00000d70
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#define XGMAC_PPS_MAXIDX(x) ((((x) + 1) * 8) - 1)
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#define XGMAC_PPS_MINIDX(x) ((x) * 8)
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#define XGMAC_PPSx_MASK(x) \
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GENMASK(XGMAC_PPS_MAXIDX(x), XGMAC_PPS_MINIDX(x))
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#define XGMAC_TRGTMODSELx(x, val) \
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GENMASK(XGMAC_PPS_MAXIDX(x) - 1, XGMAC_PPS_MAXIDX(x) - 2) & \
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((val) << (XGMAC_PPS_MAXIDX(x) - 2))
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#define XGMAC_PPSCMDx(x, val) \
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GENMASK(XGMAC_PPS_MINIDX(x) + 3, XGMAC_PPS_MINIDX(x)) & \
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((val) << XGMAC_PPS_MINIDX(x))
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#define XGMAC_PPSCMD_START 0x2
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#define XGMAC_PPSCMD_STOP 0x5
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#define XGMAC_PPSEN0 BIT(4)
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#define XGMAC_PPSx_TARGET_TIME_SEC(x) (0x00000d80 + (x) * 0x10)
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#define XGMAC_PPSx_TARGET_TIME_NSEC(x) (0x00000d84 + (x) * 0x10)
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#define XGMAC_TRGTBUSY0 BIT(31)
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#define XGMAC_PPSx_INTERVAL(x) (0x00000d88 + (x) * 0x10)
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#define XGMAC_PPSx_WIDTH(x) (0x00000d8c + (x) * 0x10)
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/* MTL Registers */
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#define XGMAC_MTL_OPMODE 0x00001000
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@ -8,6 +8,7 @@
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#include <linux/crc32.h>
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#include <linux/iopoll.h>
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#include "stmmac.h"
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#include "stmmac_ptp.h"
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#include "dwxgmac2.h"
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static void dwxgmac2_core_init(struct mac_device_info *hw,
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@ -1011,6 +1012,60 @@ static int dwxgmac2_get_mac_tx_timestamp(struct mac_device_info *hw, u64 *ts)
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return 0;
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}
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static int dwxgmac2_flex_pps_config(void __iomem *ioaddr, int index,
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struct stmmac_pps_cfg *cfg, bool enable,
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u32 sub_second_inc, u32 systime_flags)
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{
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u32 tnsec = readl(ioaddr + XGMAC_PPSx_TARGET_TIME_NSEC(index));
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u32 val = readl(ioaddr + XGMAC_PPS_CONTROL);
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u64 period;
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if (!cfg->available)
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return -EINVAL;
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if (tnsec & XGMAC_TRGTBUSY0)
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return -EBUSY;
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if (!sub_second_inc || !systime_flags)
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return -EINVAL;
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val &= ~XGMAC_PPSx_MASK(index);
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if (!enable) {
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val |= XGMAC_PPSCMDx(index, XGMAC_PPSCMD_STOP);
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writel(val, ioaddr + XGMAC_PPS_CONTROL);
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return 0;
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}
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val |= XGMAC_PPSCMDx(index, XGMAC_PPSCMD_START);
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val |= XGMAC_TRGTMODSELx(index, XGMAC_PPSCMD_START);
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val |= XGMAC_PPSEN0;
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writel(cfg->start.tv_sec, ioaddr + XGMAC_PPSx_TARGET_TIME_SEC(index));
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if (!(systime_flags & PTP_TCR_TSCTRLSSR))
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cfg->start.tv_nsec = (cfg->start.tv_nsec * 1000) / 465;
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writel(cfg->start.tv_nsec, ioaddr + XGMAC_PPSx_TARGET_TIME_NSEC(index));
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period = cfg->period.tv_sec * 1000000000;
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period += cfg->period.tv_nsec;
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do_div(period, sub_second_inc);
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if (period <= 1)
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return -EINVAL;
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writel(period - 1, ioaddr + XGMAC_PPSx_INTERVAL(index));
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period >>= 1;
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if (period <= 1)
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return -EINVAL;
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writel(period - 1, ioaddr + XGMAC_PPSx_WIDTH(index));
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/* Finally, activate it */
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writel(val, ioaddr + XGMAC_PPS_CONTROL);
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return 0;
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}
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const struct stmmac_ops dwxgmac210_ops = {
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.core_init = dwxgmac2_core_init,
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.set_mac = dwxgmac2_set_mac,
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@ -1048,6 +1103,7 @@ const struct stmmac_ops dwxgmac210_ops = {
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.update_vlan_hash = dwxgmac2_update_vlan_hash,
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.rxp_config = dwxgmac3_rxp_config,
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.get_mac_tx_timestamp = dwxgmac2_get_mac_tx_timestamp,
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.flex_pps_config = dwxgmac2_flex_pps_config,
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};
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int dwxgmac2_setup(struct stmmac_priv *priv)
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