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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-01 10:46:48 +07:00
iwlwifi: remove set_pwr_src operation
The set_pwr_src operation is only ever used from within the same sub-driver that it is declared in, so it can just be called directly instead of being an operation. Also, it is never called to set the power source to V_aux, so change the two functions accordingly (but keep the V_aux code for documentation purposes in a comment). Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
This commit is contained in:
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0453674c90
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9597ebac91
@ -196,7 +196,6 @@ static struct iwl_lib_ops iwl1000_lib = {
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.init = iwl_apm_init,
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.init = iwl_apm_init,
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.stop = iwl_apm_stop,
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.stop = iwl_apm_stop,
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.config = iwl1000_nic_config,
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.config = iwl1000_nic_config,
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.set_pwr_src = iwl_set_pwr_src,
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},
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},
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.eeprom_ops = {
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.eeprom_ops = {
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.regulatory_bands = {
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.regulatory_bands = {
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@ -816,9 +816,12 @@ static u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate)
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return sta_id;
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return sta_id;
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}
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}
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static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
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static void iwl3945_set_pwr_vmain(struct iwl_priv *priv)
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{
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{
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if (src == IWL_PWR_SRC_VAUX) {
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/*
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* (for documentation purposes)
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* to set power to V_AUX, do
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if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
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if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
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APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
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@ -828,16 +831,14 @@ static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
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CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
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CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
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CSR_GPIO_IN_BIT_AUX_POWER, 5000);
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CSR_GPIO_IN_BIT_AUX_POWER, 5000);
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}
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}
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} else {
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*/
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
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~APMG_PS_CTRL_MSK_PWR_SRC);
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iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
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APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
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}
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~APMG_PS_CTRL_MSK_PWR_SRC);
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return 0;
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iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
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CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
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}
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}
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static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
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static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
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@ -1031,9 +1032,7 @@ int iwl3945_hw_nic_init(struct iwl_priv *priv)
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priv->cfg->ops->lib->apm_ops.init(priv);
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priv->cfg->ops->lib->apm_ops.init(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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spin_unlock_irqrestore(&priv->lock, flags);
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rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
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iwl3945_set_pwr_vmain(priv);
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if (rc)
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return rc;
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priv->cfg->ops->lib->apm_ops.config(priv);
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priv->cfg->ops->lib->apm_ops.config(priv);
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@ -2707,7 +2706,6 @@ static struct iwl_lib_ops iwl3945_lib = {
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.init = iwl3945_apm_init,
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.init = iwl3945_apm_init,
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.stop = iwl_apm_stop,
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.stop = iwl_apm_stop,
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.config = iwl3945_nic_config,
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.config = iwl3945_nic_config,
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.set_pwr_src = iwl3945_set_pwr_src,
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},
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},
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.eeprom_ops = {
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.eeprom_ops = {
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.regulatory_bands = {
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.regulatory_bands = {
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@ -2268,7 +2268,6 @@ static struct iwl_lib_ops iwl4965_lib = {
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.init = iwl_apm_init,
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.init = iwl_apm_init,
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.stop = iwl_apm_stop,
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.stop = iwl_apm_stop,
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.config = iwl4965_nic_config,
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.config = iwl4965_nic_config,
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.set_pwr_src = iwl_set_pwr_src,
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},
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},
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.eeprom_ops = {
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.eeprom_ops = {
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.regulatory_bands = {
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.regulatory_bands = {
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@ -370,7 +370,6 @@ static struct iwl_lib_ops iwl5000_lib = {
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.init = iwl_apm_init,
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.init = iwl_apm_init,
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.stop = iwl_apm_stop,
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.stop = iwl_apm_stop,
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.config = iwl5000_nic_config,
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.config = iwl5000_nic_config,
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.set_pwr_src = iwl_set_pwr_src,
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},
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},
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.eeprom_ops = {
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.eeprom_ops = {
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.regulatory_bands = {
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.regulatory_bands = {
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@ -440,7 +439,6 @@ static struct iwl_lib_ops iwl5150_lib = {
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.init = iwl_apm_init,
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.init = iwl_apm_init,
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.stop = iwl_apm_stop,
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.stop = iwl_apm_stop,
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.config = iwl5000_nic_config,
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.config = iwl5000_nic_config,
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.set_pwr_src = iwl_set_pwr_src,
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},
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},
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.eeprom_ops = {
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.eeprom_ops = {
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.regulatory_bands = {
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.regulatory_bands = {
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@ -310,7 +310,6 @@ static struct iwl_lib_ops iwl6000_lib = {
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.init = iwl_apm_init,
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.init = iwl_apm_init,
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.stop = iwl_apm_stop,
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.stop = iwl_apm_stop,
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.config = iwl6000_nic_config,
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.config = iwl6000_nic_config,
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.set_pwr_src = iwl_set_pwr_src,
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},
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},
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.eeprom_ops = {
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.eeprom_ops = {
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.regulatory_bands = {
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.regulatory_bands = {
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@ -383,7 +382,6 @@ static struct iwl_lib_ops iwl6000g2b_lib = {
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.init = iwl_apm_init,
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.init = iwl_apm_init,
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.stop = iwl_apm_stop,
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.stop = iwl_apm_stop,
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.config = iwl6000_nic_config,
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.config = iwl6000_nic_config,
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.set_pwr_src = iwl_set_pwr_src,
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},
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},
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.eeprom_ops = {
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.eeprom_ops = {
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.regulatory_bands = {
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.regulatory_bands = {
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@ -685,6 +685,23 @@ int iwlagn_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
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return 0;
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return 0;
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}
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}
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static void iwlagn_set_pwr_vmain(struct iwl_priv *priv)
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{
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/*
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* (for documentation purposes)
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* to set power to V_AUX, do:
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if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
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~APMG_PS_CTRL_MSK_PWR_SRC);
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*/
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
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~APMG_PS_CTRL_MSK_PWR_SRC);
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}
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int iwlagn_hw_nic_init(struct iwl_priv *priv)
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int iwlagn_hw_nic_init(struct iwl_priv *priv)
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{
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{
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unsigned long flags;
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unsigned long flags;
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@ -700,7 +717,7 @@ int iwlagn_hw_nic_init(struct iwl_priv *priv)
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spin_unlock_irqrestore(&priv->lock, flags);
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spin_unlock_irqrestore(&priv->lock, flags);
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ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
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iwlagn_set_pwr_vmain(priv);
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priv->cfg->ops->lib->apm_ops.config(priv);
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priv->cfg->ops->lib->apm_ops.config(priv);
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@ -935,22 +935,6 @@ static void iwl_rx_card_state_notif(struct iwl_priv *priv,
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wake_up_interruptible(&priv->wait_command_queue);
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wake_up_interruptible(&priv->wait_command_queue);
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}
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}
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int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
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{
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if (src == IWL_PWR_SRC_VAUX) {
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if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
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~APMG_PS_CTRL_MSK_PWR_SRC);
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} else {
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iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
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~APMG_PS_CTRL_MSK_PWR_SRC);
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}
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return 0;
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}
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static void iwl_bg_tx_flush(struct work_struct *work)
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static void iwl_bg_tx_flush(struct work_struct *work)
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{
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{
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struct iwl_priv *priv =
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struct iwl_priv *priv =
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@ -119,7 +119,6 @@ struct iwl_apm_ops {
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int (*init)(struct iwl_priv *priv);
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int (*init)(struct iwl_priv *priv);
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void (*stop)(struct iwl_priv *priv);
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void (*stop)(struct iwl_priv *priv);
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void (*config)(struct iwl_priv *priv);
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void (*config)(struct iwl_priv *priv);
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int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src);
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};
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};
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struct iwl_debugfs_ops {
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struct iwl_debugfs_ops {
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@ -282,13 +282,6 @@ struct iwl_channel_info {
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*/
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*/
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#define IWL_IPAN_MCAST_QUEUE 8
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#define IWL_IPAN_MCAST_QUEUE 8
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/* Power management (not Tx power) structures */
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enum iwl_pwr_src {
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IWL_PWR_SRC_VMAIN,
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IWL_PWR_SRC_VAUX,
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};
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#define IEEE80211_DATA_LEN 2304
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#define IEEE80211_DATA_LEN 2304
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#define IEEE80211_4ADDR_LEN 30
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#define IEEE80211_4ADDR_LEN 30
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#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
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#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
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@ -732,7 +725,6 @@ struct iwl_hw_params {
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*
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*
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****************************************************************************/
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****************************************************************************/
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extern void iwl_update_chain_flags(struct iwl_priv *priv);
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extern void iwl_update_chain_flags(struct iwl_priv *priv);
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extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
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extern const u8 iwl_bcast_addr[ETH_ALEN];
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extern const u8 iwl_bcast_addr[ETH_ALEN];
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extern int iwl_rxq_stop(struct iwl_priv *priv);
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extern int iwl_rxq_stop(struct iwl_priv *priv);
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extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
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extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
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