dt-bindings: clock: Convert Calxeda clock bindings to json-schema

Convert the Calxeda clock bindings to DT schema format using json-schema.

This just covers the actual PLL and divider clock nodes. In the actual
DTs they are somewhat unconnected (no ranges or bus compatible) children
of the sregs node, but for the actual clock bindings this is not
relevant.

One oddity is that the addresses are relative to the parent node,
without that being pronounced using a ranges property.
But this is too late to fix now.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Andre Przywara 2020-04-30 22:10:47 +01:00 committed by Rob Herring
parent 3d21a46093
commit 958ba5c239
2 changed files with 82 additions and 17 deletions
Documentation/devicetree/bindings/clock

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Device Tree Clock bindings for Calxeda highbank platform
This binding uses the common clock binding[1].
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
Required properties:
- compatible : shall be one of the following:
"calxeda,hb-pll-clock" - for a PLL clock
"calxeda,hb-a9periph-clock" - The A9 peripheral clock divided from the
A9 clock.
"calxeda,hb-a9bus-clock" - The A9 bus clock divided from the A9 clock.
"calxeda,hb-emmc-clock" - Divided clock for MMC/SD controller.
- reg : shall be the control register offset from SYSREGs base for the clock.
- clocks : shall be the input parent clock phandle for the clock. This is
either an oscillator or a pll output.
- #clock-cells : from common clock binding; shall be set to 0.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/calxeda.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Device Tree Clock bindings for Calxeda highbank platform
description: |
This binding covers the Calxeda SoC internal peripheral and bus clocks
as used by peripherals. The clocks live inside the "system register"
region of the SoC, so are typically presented as children of an
"hb-sregs" node.
maintainers:
- Andre Przywara <andre.przywara@arm.com>
properties:
"#clock-cells":
const: 0
compatible:
enum:
- calxeda,hb-pll-clock
- calxeda,hb-a9periph-clock
- calxeda,hb-a9bus-clock
- calxeda,hb-emmc-clock
reg:
maxItems: 1
clocks:
maxItems: 1
required:
- "#clock-cells"
- compatible
- clocks
- reg
additionalProperties: false
examples:
- |
sregs@3fffc000 {
compatible = "calxeda,hb-sregs";
reg = <0x3fffc000 0x1000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <33333000>;
};
ddrpll: ddrpll@108 {
#clock-cells = <0>;
compatible = "calxeda,hb-pll-clock";
clocks = <&osc>;
reg = <0x108>;
};
a9pll: a9pll@100 {
#clock-cells = <0>;
compatible = "calxeda,hb-pll-clock";
clocks = <&osc>;
reg = <0x100>;
};
a9periphclk: a9periphclk@104 {
#clock-cells = <0>;
compatible = "calxeda,hb-a9periph-clock";
clocks = <&a9pll>;
reg = <0x104>;
};
};
};
...