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myri10ge: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify myri10ge driver. [bhelgaas: fix myri10ge_toggle_relaxed() return value] Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -1078,22 +1078,16 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
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#ifdef CONFIG_MYRI10GE_DCA
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static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on)
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{
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int ret, cap, err;
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int ret;
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u16 ctl;
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cap = pci_pcie_cap(pdev);
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if (!cap)
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return 0;
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err = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
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if (err)
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return 0;
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pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &ctl);
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ret = (ctl & PCI_EXP_DEVCTL_RELAX_EN) >> 4;
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if (ret != on) {
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ctl &= ~PCI_EXP_DEVCTL_RELAX_EN;
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ctl |= (on << 4);
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pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
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pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, ctl);
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}
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return ret;
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}
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@ -3192,18 +3186,13 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
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struct device *dev = &mgp->pdev->dev;
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int cap;
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unsigned err_cap;
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u16 val;
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u8 ext_type;
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int ret;
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if (!myri10ge_ecrc_enable || !bridge)
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return;
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/* check that the bridge is a root port */
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cap = pci_pcie_cap(bridge);
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pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
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ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
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if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
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if (pci_pcie_type(bridge) != PCI_EXP_TYPE_ROOT_PORT) {
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if (myri10ge_ecrc_enable > 1) {
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struct pci_dev *prev_bridge, *old_bridge = bridge;
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@ -3218,11 +3207,8 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
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" to force ECRC\n");
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return;
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}
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cap = pci_pcie_cap(bridge);
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pci_read_config_word(bridge,
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cap + PCI_CAP_FLAGS, &val);
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ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
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} while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
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} while (pci_pcie_type(bridge) !=
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PCI_EXP_TYPE_ROOT_PORT);
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dev_info(dev,
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"Forcing ECRC on non-root port %s"
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@ -3335,11 +3321,10 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
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int overridden = 0;
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if (myri10ge_force_firmware == 0) {
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int link_width, exp_cap;
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int link_width;
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u16 lnk;
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exp_cap = pci_pcie_cap(mgp->pdev);
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pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
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pcie_capability_read_word(mgp->pdev, PCI_EXP_LNKSTA, &lnk);
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link_width = (lnk >> 4) & 0x3f;
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/* Check to see if Link is less than 8 or if the
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