AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-16 18:56:41 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

media: dt: bindings: Add binding for NVIDIA Tegra Video Decoder Engine

Browse Source 
Add binding documentation for the Video Decoder Engine which is found
on NVIDIA Tegra20/30/114/124/132 SoC's.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Dmitry Osipenko 2017-12-11 19:26:07 -05:00 committed by Mauro Carvalho Chehab
parent b32a2b42f7
commit 94e53262a2
1 changed files with 55 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

55
Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt Normal file
View File

@ -0,0 +1,55 @@
NVIDIA Tegra Video Decoder Engine
Required properties:
- compatible : Must contain one of the following values:
- "nvidia,tegra20-vde"
- "nvidia,tegra30-vde"
- "nvidia,tegra114-vde"
- "nvidia,tegra124-vde"
- "nvidia,tegra132-vde"
- reg : Must contain an entry for each entry in reg-names.
- reg-names : Must include the following entries:
- sxe
- bsev
- mbe
- ppe
- mce
- tfe
- ppb
- vdma
- frameid
- iram : Must contain phandle to the mmio-sram device node that represents
IRAM region used by VDE.
- interrupts : Must contain an entry for each entry in interrupt-names.
- interrupt-names : Must include the following entries:
- sync-token
- bsev
- sxe
- clocks : Must include the following entries:
- vde
- resets : Must include the following entries:
- vde
Example:
video-codec@6001a000 {
compatible = "nvidia,tegra20-vde";
reg = <0x6001a000 0x1000 /* Syntax Engine */
0x6001b000 0x1000 /* Video Bitstream Engine */
0x6001c000 0x100 /* Macroblock Engine */
0x6001c200 0x100 /* Post-processing Engine */
0x6001c400 0x100 /* Motion Compensation Engine */
0x6001c600 0x100 /* Transform Engine */
0x6001c800 0x100 /* Pixel prediction block */
0x6001ca00 0x100 /* Video DMA */
0x6001d800 0x300 /* Video frame controls */>;
reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
"tfe", "ppb", "vdma", "frameid";
iram = <&vde_pool>; /* IRAM region */
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
interrupt-names = "sync-token", "bsev", "sxe";
clocks = <&tegra_car TEGRA20_CLK_VDE>;
resets = <&tegra_car 61>;
};