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KVM: SVM: Only save/restore MSRs when needed

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We only have to save/restore MSR_GS_BASE on every VMEXIT.  The rest can be
saved/restored when we leave the VCPU.  Since we don't emulate the DEBUGCTL
MSRs and the guest cannot write to them, we don't have to worry about
saving/restoring them at all.

This shaves a whopping 40% off raw vmexit costs on AMD.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
This commit is contained in:
Anthony Liguori 2007-04-29 11:56:06 +03:00 committed by Avi Kivity
parent 2807696c37
commit 94dfbdb389
2 changed files with 20 additions and 17 deletions
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11
drivers/kvm/kvm_svm.h
View File

@ -9,17 +9,15 @@
#include "svm.h" #include "svm.h"
#include "kvm.h" #include "kvm.h"
static const u32 host_save_msrs[] = { static const u32 host_save_user_msrs[] = {
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE, MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE,
MSR_FS_BASE, MSR_GS_BASE, MSR_FS_BASE,
#endif #endif
MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
MSR_IA32_DEBUGCTLMSR, /*MSR_IA32_LASTBRANCHFROMIP,
MSR_IA32_LASTBRANCHTOIP, MSR_IA32_LASTINTFROMIP,MSR_IA32_LASTINTTOIP,*/
}; };
#define NR_HOST_SAVE_MSRS ARRAY_SIZE(host_save_msrs) #define NR_HOST_SAVE_USER_MSRS ARRAY_SIZE(host_save_user_msrs)
#define NUM_DB_REGS 4 #define NUM_DB_REGS 4
struct vcpu_svm { struct vcpu_svm {
@ -32,7 +30,8 @@ struct vcpu_svm {
u64 next_rip; u64 next_rip;
u64 host_msrs[NR_HOST_SAVE_MSRS]; u64 host_user_msrs[NR_HOST_SAVE_USER_MSRS];
u64 host_gs_base;
unsigned long host_cr2; unsigned long host_cr2;
unsigned long host_db_regs[NUM_DB_REGS]; unsigned long host_db_regs[NUM_DB_REGS];
unsigned long host_dr6; unsigned long host_dr6;

26
drivers/kvm/svm.c
View File

@ -522,8 +522,6 @@ static void init_vmcb(struct vmcb *vmcb)
control->msrpm_base_pa = msrpm_base; control->msrpm_base_pa = msrpm_base;
control->tsc_offset = 0; control->tsc_offset = 0;
control->int_ctl = V_INTR_MASKING_MASK; control->int_ctl = V_INTR_MASKING_MASK;
if (svm_has(SVM_FEATURE_LBRV))
control->lbr_ctl = 1ULL;
init_seg(&save->es); init_seg(&save->es);
init_seg(&save->ss); init_seg(&save->ss);
@ -611,7 +609,7 @@ static void svm_free_vcpu(struct kvm_vcpu *vcpu)
static void svm_vcpu_load(struct kvm_vcpu *vcpu) static void svm_vcpu_load(struct kvm_vcpu *vcpu)
{ {
int cpu; int cpu, i;
cpu = get_cpu(); cpu = get_cpu();
if (unlikely(cpu != vcpu->cpu)) { if (unlikely(cpu != vcpu->cpu)) {
@ -626,10 +624,18 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu)
vcpu->svm->vmcb->control.tsc_offset += delta; vcpu->svm->vmcb->control.tsc_offset += delta;
vcpu->cpu = cpu; vcpu->cpu = cpu;
} }
for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
rdmsrl(host_save_user_msrs[i], vcpu->svm->host_user_msrs[i]);
} }
static void svm_vcpu_put(struct kvm_vcpu *vcpu) static void svm_vcpu_put(struct kvm_vcpu *vcpu)
{ {
int i;
for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
wrmsrl(host_save_user_msrs[i], vcpu->svm->host_user_msrs[i]);
rdtscll(vcpu->host_tsc); rdtscll(vcpu->host_tsc);
put_cpu(); put_cpu();
} }
@ -815,18 +821,16 @@ static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
static void load_host_msrs(struct kvm_vcpu *vcpu) static void load_host_msrs(struct kvm_vcpu *vcpu)
{ {
int i; #ifdef CONFIG_X86_64
wrmsrl(MSR_GS_BASE, vcpu->svm->host_gs_base);
for ( i = 0; i < NR_HOST_SAVE_MSRS; i++) #endif
wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
} }
static void save_host_msrs(struct kvm_vcpu *vcpu) static void save_host_msrs(struct kvm_vcpu *vcpu)
{ {
int i; #ifdef CONFIG_X86_64
rdmsrl(MSR_GS_BASE, vcpu->svm->host_gs_base);
for ( i = 0; i < NR_HOST_SAVE_MSRS; i++) #endif
rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
} }
static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data) static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)