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drm/bridge: dw_hdmi: support i2c extended read mode

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"I2C Master Interface Extended Read Mode" implements a segment
pointer-based read operation using the Special Register configuration.

This patch fix https://patchwork.kernel.org/patch/7098101/ mentioned
"The current implementation does not support "I2C Master Interface
Extended Read Mode" to read data addressed by non-zero segment
pointer, this means that if EDID has more than 1 extension blocks,
EDID reading operation won't succeed"

With this patch, dw-hdmi can read EDID data with 1/2/4 blocks.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1489978651-16647-1-git-send-email-nickey.yang@rock-chips.com
This commit is contained in:
Nickey Yang 2017-03-20 10:57:31 +08:00 committed by Archit Taneja
parent 3a270e4dcc
commit 94bb4dc132
1 changed files with 24 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
View File

@ -33,6 +33,7 @@
#include "dw-hdmi.h" #include "dw-hdmi.h"
#include "dw-hdmi-audio.h" #include "dw-hdmi-audio.h"
#define DDC_SEGMENT_ADDR 0x30
#define HDMI_EDID_LEN 512 #define HDMI_EDID_LEN 512
#define RGB 0 #define RGB 0
@ -112,6 +113,7 @@ struct dw_hdmi_i2c {
u8 slave_reg; u8 slave_reg;
bool is_regaddr; bool is_regaddr;
bool is_segment;
}; };
struct dw_hdmi_phy_data { struct dw_hdmi_phy_data {
@ -247,8 +249,12 @@ static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
reinit_completion(&i2c->cmp); reinit_completion(&i2c->cmp);
hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS); hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ, if (i2c->is_segment)
HDMI_I2CM_OPERATION); hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ_EXT,
HDMI_I2CM_OPERATION);
else
hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
HDMI_I2CM_OPERATION);
stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10); stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
if (!stat) if (!stat)
@ -260,6 +266,7 @@ static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI); *buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
} }
i2c->is_segment = false;
return 0; return 0;
} }
@ -309,12 +316,6 @@ static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr); dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
for (i = 0; i < num; i++) { for (i = 0; i < num; i++) {
if (msgs[i].addr != addr) {
dev_warn(hdmi->dev,
"unsupported transfer, changed slave address\n");
return -EOPNOTSUPP;
}
if (msgs[i].len == 0) { if (msgs[i].len == 0) {
dev_dbg(hdmi->dev, dev_dbg(hdmi->dev,
"unsupported transfer %d/%d, no data\n", "unsupported transfer %d/%d, no data\n",
@ -334,15 +335,24 @@ static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
/* Set slave device register address on transfer */ /* Set slave device register address on transfer */
i2c->is_regaddr = false; i2c->is_regaddr = false;
/* Set segment pointer for I2C extended read mode operation */
i2c->is_segment = false;
for (i = 0; i < num; i++) { for (i = 0; i < num; i++) {
dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n", dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
i + 1, num, msgs[i].len, msgs[i].flags); i + 1, num, msgs[i].len, msgs[i].flags);
if (msgs[i].addr == DDC_SEGMENT_ADDR && msgs[i].len == 1) {
if (msgs[i].flags & I2C_M_RD) i2c->is_segment = true;
ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf, msgs[i].len); hdmi_writeb(hdmi, DDC_SEGMENT_ADDR, HDMI_I2CM_SEGADDR);
else hdmi_writeb(hdmi, *msgs[i].buf, HDMI_I2CM_SEGPTR);
ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf, msgs[i].len); } else {
if (msgs[i].flags & I2C_M_RD)
ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf,
msgs[i].len);
else
ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf,
msgs[i].len);
}
if (ret < 0) if (ret < 0)
break; break;
} }