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Blackfin arch: do not allow L2 to be cached on BF561 SMP
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -866,7 +866,7 @@ endchoice
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config BFIN_L2_CACHEABLE
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bool "Cache L2 SRAM"
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depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
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depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
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default n
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help
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Select to make L2 SRAM cacheable in L1 data and instruction cache.
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