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powerpc/6xx: Store PGDIR physical address in a SPRG

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Use SPRN_SPRG2 to store the current thread PGDIR and
avoid reading thread_struct.pgdir at every TLB miss.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Christophe Leroy 2019-02-21 10:37:55 +00:00 committed by Michael Ellerman
parent 0df977eafc
commit 93c4a162b0
4 changed files with 18 additions and 15 deletions
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1
arch/powerpc/include/asm/reg.h
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@ -1167,6 +1167,7 @@
#ifdef CONFIG_PPC_BOOK3S_32 #ifdef CONFIG_PPC_BOOK3S_32
#define SPRN_SPRG_SCRATCH0 SPRN_SPRG0 #define SPRN_SPRG_SCRATCH0 SPRN_SPRG0
#define SPRN_SPRG_SCRATCH1 SPRN_SPRG1 #define SPRN_SPRG_SCRATCH1 SPRN_SPRG1
#define SPRN_SPRG_PGDIR SPRN_SPRG2
#define SPRN_SPRG_603_LRU SPRN_SPRG4 #define SPRN_SPRG_603_LRU SPRN_SPRG4
#endif #endif

4
arch/powerpc/kernel/cpu_setup_6xx.S
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@ -24,6 +24,10 @@ BEGIN_MMU_FTR_SECTION
li r10,0 li r10,0
mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */ mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
lis r10, (swapper_pg_dir - PAGE_OFFSET)@h
ori r10, r10, (swapper_pg_dir - PAGE_OFFSET)@l
mtspr SPRN_SPRG_PGDIR, r10
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
bl __init_fpu_registers bl __init_fpu_registers
END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)

25
arch/powerpc/kernel/head_32.S
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@ -500,16 +500,15 @@ InstructionTLBMiss:
mfspr r3,SPRN_IMISS mfspr r3,SPRN_IMISS
lis r1,PAGE_OFFSET@h /* check if kernel address */ lis r1,PAGE_OFFSET@h /* check if kernel address */
cmplw 0,r1,r3 cmplw 0,r1,r3
mfspr r2,SPRN_SPRG_THREAD mfspr r2, SPRN_SPRG_PGDIR
li r1,_PAGE_USER|_PAGE_PRESENT|_PAGE_EXEC /* low addresses tested as user */ li r1,_PAGE_USER|_PAGE_PRESENT|_PAGE_EXEC /* low addresses tested as user */
lwz r2,PGDIR(r2)
bge- 112f bge- 112f
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
lis r2,swapper_pg_dir@ha /* if kernel address, use */ lis r2,swapper_pg_dir@ha /* if kernel address, use */
addi r2,r2,swapper_pg_dir@l /* kernel page table */ addi r2,r2,swapper_pg_dir@l /* kernel page table */
112: tophys(r2,r2) tophys(r2,r2)
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ 112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
lwz r2,0(r2) /* get pmd entry */ lwz r2,0(r2) /* get pmd entry */
rlwinm. r2,r2,0,0,19 /* extract address of pte page */ rlwinm. r2,r2,0,0,19 /* extract address of pte page */
beq- InstructionAddressInvalid /* return if no mapping */ beq- InstructionAddressInvalid /* return if no mapping */
@ -574,16 +573,15 @@ DataLoadTLBMiss:
mfspr r3,SPRN_DMISS mfspr r3,SPRN_DMISS
lis r1,PAGE_OFFSET@h /* check if kernel address */ lis r1,PAGE_OFFSET@h /* check if kernel address */
cmplw 0,r1,r3 cmplw 0,r1,r3
mfspr r2,SPRN_SPRG_THREAD mfspr r2, SPRN_SPRG_PGDIR
li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
lwz r2,PGDIR(r2)
bge- 112f bge- 112f
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
lis r2,swapper_pg_dir@ha /* if kernel address, use */ lis r2,swapper_pg_dir@ha /* if kernel address, use */
addi r2,r2,swapper_pg_dir@l /* kernel page table */ addi r2,r2,swapper_pg_dir@l /* kernel page table */
112: tophys(r2,r2) tophys(r2,r2)
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ 112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
lwz r2,0(r2) /* get pmd entry */ lwz r2,0(r2) /* get pmd entry */
rlwinm. r2,r2,0,0,19 /* extract address of pte page */ rlwinm. r2,r2,0,0,19 /* extract address of pte page */
beq- DataAddressInvalid /* return if no mapping */ beq- DataAddressInvalid /* return if no mapping */
@ -658,16 +656,15 @@ DataStoreTLBMiss:
mfspr r3,SPRN_DMISS mfspr r3,SPRN_DMISS
lis r1,PAGE_OFFSET@h /* check if kernel address */ lis r1,PAGE_OFFSET@h /* check if kernel address */
cmplw 0,r1,r3 cmplw 0,r1,r3
mfspr r2,SPRN_SPRG_THREAD mfspr r2, SPRN_SPRG_PGDIR
li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */ li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
lwz r2,PGDIR(r2)
bge- 112f bge- 112f
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
lis r2,swapper_pg_dir@ha /* if kernel address, use */ lis r2,swapper_pg_dir@ha /* if kernel address, use */
addi r2,r2,swapper_pg_dir@l /* kernel page table */ addi r2,r2,swapper_pg_dir@l /* kernel page table */
112: tophys(r2,r2) tophys(r2,r2)
rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ 112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
lwz r2,0(r2) /* get pmd entry */ lwz r2,0(r2) /* get pmd entry */
rlwinm. r2,r2,0,0,19 /* extract address of pte page */ rlwinm. r2,r2,0,0,19 /* extract address of pte page */
beq- DataAddressInvalid /* return if no mapping */ beq- DataAddressInvalid /* return if no mapping */
@ -1024,14 +1021,16 @@ _ENTRY(switch_mmu_context)
li r0,NUM_USER_SEGMENTS li r0,NUM_USER_SEGMENTS
mtctr r0 mtctr r0
lwz r4, MM_PGD(r4)
#ifdef CONFIG_BDI_SWITCH #ifdef CONFIG_BDI_SWITCH
/* Context switch the PTE pointer for the Abatron BDI2000. /* Context switch the PTE pointer for the Abatron BDI2000.
* The PGDIR is passed as second argument. * The PGDIR is passed as second argument.
*/ */
lwz r4,MM_PGD(r4)
lis r5, abatron_pteptrs@ha lis r5, abatron_pteptrs@ha
stw r4, abatron_pteptrs@l + 0x4(r5) stw r4, abatron_pteptrs@l + 0x4(r5)
#endif #endif
tophys(r4, r4)
mtspr SPRN_SPRG_PGDIR, r4
li r4,0 li r4,0
isync isync
3: 3:

3
arch/powerpc/mm/hash_low_32.S
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@ -70,9 +70,8 @@ _GLOBAL(hash_page)
/* Get PTE (linux-style) and check access */ /* Get PTE (linux-style) and check access */
lis r0,KERNELBASE@h /* check if kernel address */ lis r0,KERNELBASE@h /* check if kernel address */
cmplw 0,r4,r0 cmplw 0,r4,r0
mfspr r8,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
ori r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */ ori r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */
lwz r5,PGDIR(r8) /* virt page-table root */ mfspr r5, SPRN_SPRG_PGDIR /* virt page-table root */
blt+ 112f /* assume user more likely */ blt+ 112f /* assume user more likely */
lis r5,swapper_pg_dir@ha /* if kernel address, use */ lis r5,swapper_pg_dir@ha /* if kernel address, use */
addi r5,r5,swapper_pg_dir@l /* kernel page table */ addi r5,r5,swapper_pg_dir@l /* kernel page table */