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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 20:50:54 +07:00
Merge branch 'irq/for-arm' into irq/core
Pull in the branch which can be consumed by ARM to build their changes on top.
This commit is contained in:
commit
939ef66848
@ -30,6 +30,7 @@ config ARM_GIC_V3_ITS
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config ARM_NVIC
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bool
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select IRQ_DOMAIN
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select IRQ_DOMAIN_HIERARCHY
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select GENERIC_IRQ_CHIP
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config ARM_VIC
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@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
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handle_IRQ(irq, regs);
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}
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static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *arg)
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{
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int i, ret;
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irq_hw_number_t hwirq;
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unsigned int type = IRQ_TYPE_NONE;
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struct of_phandle_args *irq_data = arg;
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ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
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irq_data->args_count, &hwirq, &type);
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if (ret)
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return ret;
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for (i = 0; i < nr_irqs; i++)
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irq_map_generic_chip(domain, virq + i, hwirq + i);
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return 0;
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}
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static const struct irq_domain_ops nvic_irq_domain_ops = {
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.xlate = irq_domain_xlate_onecell,
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.alloc = nvic_irq_domain_alloc,
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.free = irq_domain_free_irqs_top,
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};
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static int __init nvic_of_init(struct device_node *node,
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struct device_node *parent)
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{
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@ -70,7 +95,8 @@ static int __init nvic_of_init(struct device_node *node,
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irqs = NVIC_MAX_IRQ;
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nvic_irq_domain =
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irq_domain_add_linear(node, irqs, &irq_generic_chip_ops, NULL);
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irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL);
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if (!nvic_irq_domain) {
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pr_warn("Failed to allocate irq domain\n");
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return -ENOMEM;
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@ -47,6 +47,7 @@ struct vf610_mscm_ir_chip_data {
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void __iomem *mscm_ir_base;
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u16 cpu_mask;
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u16 saved_irsprc[MSCM_IRSPRC_NUM];
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bool is_nvic;
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};
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static struct vf610_mscm_ir_chip_data *mscm_ir_data;
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@ -101,7 +102,7 @@ static void vf610_mscm_ir_enable(struct irq_data *data)
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writew_relaxed(chip_data->cpu_mask,
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chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
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irq_chip_unmask_parent(data);
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irq_chip_enable_parent(data);
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}
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static void vf610_mscm_ir_disable(struct irq_data *data)
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@ -111,7 +112,7 @@ static void vf610_mscm_ir_disable(struct irq_data *data)
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writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
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irq_chip_mask_parent(data);
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irq_chip_disable_parent(data);
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}
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static struct irq_chip vf610_mscm_ir_irq_chip = {
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@ -143,10 +144,17 @@ static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int vi
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domain->host_data);
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gic_data.np = domain->parent->of_node;
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gic_data.args_count = 3;
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gic_data.args[0] = GIC_SPI;
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gic_data.args[1] = irq_data->args[0];
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gic_data.args[2] = irq_data->args[1];
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if (mscm_ir_data->is_nvic) {
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gic_data.args_count = 1;
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gic_data.args[0] = irq_data->args[0];
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} else {
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gic_data.args_count = 3;
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gic_data.args[0] = GIC_SPI;
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gic_data.args[1] = irq_data->args[0];
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gic_data.args[2] = irq_data->args[1];
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}
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return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data);
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}
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@ -198,6 +206,9 @@ static int __init vf610_mscm_ir_of_init(struct device_node *node,
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goto out_unmap;
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}
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if (of_device_is_compatible(domain->parent->of_node, "arm,armv7m-nvic"))
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mscm_ir_data->is_nvic = true;
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cpu_pm_register_notifier(&mscm_ir_notifier_block);
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return 0;
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@ -458,6 +458,8 @@ extern void handle_nested_irq(unsigned int irq);
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extern int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg);
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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extern void irq_chip_enable_parent(struct irq_data *data);
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extern void irq_chip_disable_parent(struct irq_data *data);
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extern void irq_chip_ack_parent(struct irq_data *data);
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extern int irq_chip_retrigger_hierarchy(struct irq_data *data);
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extern void irq_chip_mask_parent(struct irq_data *data);
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@ -258,6 +258,10 @@ int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr,
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/* V2 interfaces to support hierarchy IRQ domains. */
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extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain,
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unsigned int virq);
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extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq, struct irq_chip *chip,
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void *chip_data, irq_flow_handler_t handler,
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void *handler_data, const char *handler_name);
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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extern struct irq_domain *irq_domain_add_hierarchy(struct irq_domain *parent,
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unsigned int flags, unsigned int size,
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@ -281,10 +285,6 @@ extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain,
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irq_hw_number_t hwirq,
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struct irq_chip *chip,
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void *chip_data);
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extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq, struct irq_chip *chip,
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void *chip_data, irq_flow_handler_t handler,
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void *handler_data, const char *handler_name);
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extern void irq_domain_reset_irq_data(struct irq_data *irq_data);
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extern void irq_domain_free_irqs_common(struct irq_domain *domain,
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unsigned int virq,
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@ -875,6 +875,34 @@ void irq_cpu_offline(void)
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}
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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/**
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* irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
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* NULL)
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* @data: Pointer to interrupt specific data
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*/
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void irq_chip_enable_parent(struct irq_data *data)
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{
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data = data->parent_data;
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if (data->chip->irq_enable)
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data->chip->irq_enable(data);
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else
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data->chip->irq_unmask(data);
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}
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/**
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* irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
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* NULL)
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* @data: Pointer to interrupt specific data
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*/
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void irq_chip_disable_parent(struct irq_data *data)
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{
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data = data->parent_data;
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if (data->chip->irq_disable)
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data->chip->irq_disable(data);
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else
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data->chip->irq_mask(data);
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}
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/**
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* irq_chip_ack_parent - Acknowledge the parent interrupt
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* @data: Pointer to interrupt specific data
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@ -360,7 +360,7 @@ static struct lock_class_key irq_nested_lock_class;
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int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
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irq_hw_number_t hw_irq)
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{
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struct irq_data *data = irq_get_irq_data(virq);
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struct irq_data *data = irq_domain_get_irq_data(d, virq);
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struct irq_domain_chip_generic *dgc = d->gc;
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struct irq_chip_generic *gc;
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struct irq_chip_type *ct;
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@ -405,8 +405,7 @@ int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
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else
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data->mask = 1 << idx;
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irq_set_chip_and_handler(virq, chip, ct->handler);
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irq_set_chip_data(virq, gc);
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irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL);
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irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
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return 0;
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}
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@ -1232,6 +1232,27 @@ struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain,
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return (irq_data && irq_data->domain == domain) ? irq_data : NULL;
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}
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/**
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* irq_domain_set_info - Set the complete data for a @virq in @domain
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* @domain: Interrupt domain to match
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* @virq: IRQ number
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* @hwirq: The hardware interrupt number
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* @chip: The associated interrupt chip
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* @chip_data: The associated interrupt chip data
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* @handler: The interrupt flow handler
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* @handler_data: The interrupt flow handler data
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* @handler_name: The interrupt handler name
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*/
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void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq, struct irq_chip *chip,
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void *chip_data, irq_flow_handler_t handler,
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void *handler_data, const char *handler_name)
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{
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irq_set_chip_and_handler_name(virq, chip, handler, handler_name);
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irq_set_chip_data(virq, chip_data);
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irq_set_handler_data(virq, handler_data);
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}
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static void irq_domain_check_hierarchy(struct irq_domain *domain)
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{
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}
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